Hardware-accelerated 8-bit parallel ("Intel 8080"-style) TFT display driver for ESP32-family targets, built on ESP-IDF's esp_lcd panel-IO layer - the same layer DisplayDriverQSPI.h uses for QSPI, just pointed at a different underlying peripheral. Where DisplayDriverSPI.h's hardware-parallel counterpart (DisplayDriverParallel8.h) bit-bangs D0-D7 one digitalWrite() per bit, this class drives the bus via DMA through whichever peripheral the target actually has:
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| | DisplayDriverParallel8ESP32 (int8_t d0, int8_t d1, int8_t d2, int8_t d3, int8_t d4, int8_t d5, int8_t d6, int8_t d7, int8_t wr, int8_t dc, int8_t cs, size_t width=240, size_t height=320, uint32_t pclkHz=20000000) |
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| void | end () override |
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| | ~DisplayDriverParallel8ESP32 () override |
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| size_t | width () const override |
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| size_t | height () const override |
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| bool | writeData (ISurface< RGB_T > &surface) override |
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| bool | writeData (ISurface< RGB_T > &surface, size_t x, size_t y) override |
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| virtual | ~DisplayDriver ()=default |
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| virtual bool | begin ()=0 |
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| virtual void | end () |
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| virtual bool | writeData (ISurface< RGB_T > &surface)=0 |
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| virtual bool | writeData (ISurface< RGB_T > &surface, size_t x, size_t y)=0 |
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| virtual void | setRotation (DisplayRotation rotation) |
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| virtual size_t | width () const =0 |
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| virtual size_t | height () const =0 |
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| void | writeColor (size_t width, size_t height, RGB_T color) |
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template<typename RGB_T = RGB565>
class tinygpu::DisplayDriverParallel8ESP32< RGB_T >
Hardware-accelerated 8-bit parallel ("Intel 8080"-style) TFT display driver for ESP32-family targets, built on ESP-IDF's esp_lcd panel-IO layer - the same layer DisplayDriverQSPI.h uses for QSPI, just pointed at a different underlying peripheral. Where DisplayDriverSPI.h's hardware-parallel counterpart (DisplayDriverParallel8.h) bit-bangs D0-D7 one digitalWrite() per bit, this class drives the bus via DMA through whichever peripheral the target actually has:
- SOC_LCD_I80_SUPPORTED targets (ESP32, ESP32-S2, ESP32-S3): the LCD_CAM peripheral's I80 mode, via esp_lcd_new_i80_bus() + esp_lcd_new_panel_io_i80().
- SOC_PARLIO_SUPPORTED targets (ESP32-C6, ESP32-H2, ESP32-P4, ..., which have no LCD_CAM): the PARLIO peripheral's 8-bit parallel LCD mode, via esp_lcd_new_panel_io_parl().
Which backend compiles is decided automatically from the target's soc_caps.h (TINYGPU_PARALLEL8_BACKEND_I80 / _PARLIO, set above) - the public API (constructor, writeCommand()/writeData()/setAddressWindow()) is identical either way, so concrete panel drivers below don't need to know or care which peripheral is underneath.
Build-verified (compiles and links) for the I80 backend via arduino-cli against esp32:esp32 3.3.10 on an ESP32-S3 target (esp32:esp32:adafruit_metro_esp32s3). The PARLIO backend's source compiles cleanly against the same core/version on an ESP32-C6 target (esp32:esp32:esp32c6), but fails to link there: esp_lcd_new_panel_io_parl is declared in that core's esp_lcd headers but missing from its prebuilt esp32-arduino-libs static libraries for C6 - an SDK-packaging gap in that specific core version, not a bug in this file. Verify linking against whatever core version you actually build with before relying on the PARLIO path; a plain ESP-IDF build (rather than arduino-esp32) may not have this gap.
Subclasses call the inherited beginBus() first thing in their begin() (setting up the bus/panel-IO), then send their chip's own init register sequence via writeCommand() - the same division of labor DisplayDriverQSPI.h's beginBus()/writeCommand() split uses.