|
logic-analyzer
|
Hardware-timed 8 bit parallel GPIO capture for ESP32-S3/P4, using the official esp_driver_cam "DVP" camera controller (LCD_CAM peripheral + DMA) with no real camera sensor attached - i.e. capturing raw parallel GPIO levels as if they were pixel data. More...
#include <capture_esp32s3_lcdcam.h>
Public Member Functions | |
| CaptureESP32S3LcdCam (int pinStart=1, int xclkPin=18, int pclkPin=17, int vsyncPin=15, int dePin=16) | |
| Default Constructor - data bus GPIO1..GPIO8, xclk=18, pclk=17, vsync=15, de=16. | |
| void | setDataPins (const int pins[8]) |
| Defines the 8 data pins individually if they are not contiguous. | |
| void | capture () override |
| Captures the data and dumps the result. | |
| void | captureAll () override |
| Used to masure the speed - capture into memory w/o dump! | |
| float | frequencyMeasured () |
Public Member Functions inherited from logic_analyzer::AbstractCapture | |
| AbstractCapture () | |
| Default Constructor. | |
| ~AbstractCapture () | |
| Destructor. | |
| LogicAnalyzer & | logicAnalyzer () |
| Provides access to the LogicAnalyzer. | |
| virtual PinReader & | pinReader () |
| Provides access to the PinReader. | |
| virtual void | setStatus (Status status) |
| Sets the status. | |
Protected Member Functions | |
| void | setupFor (uint32_t freqHz) |
| void | start () |
| void | waitForResult () |
| void | dump () |
Protected Member Functions inherited from logic_analyzer::AbstractCapture | |
| virtual void | setLogicAnalyzer (LogicAnalyzer &la) |
Protected Attributes | |
| int | data_pins [8] |
| int | xclk_pin |
| int | pclk_pin |
| int | vsync_pin |
| int | de_pin |
| esp_cam_ctlr_handle_t | handle = nullptr |
| esp_cam_ctlr_dvp_pin_config_t | pin_cfg {} |
| bool | is_setup = false |
| uint32_t | configured_freq = 0 |
| uint32_t | configured_samples = 0 |
| uint32_t | n_samples = 0 |
| unsigned long | start_time = 0 |
| unsigned long | run_time_us = 0 |
Protected Attributes inherited from logic_analyzer::AbstractCapture | |
| LogicAnalyzer * | logic_analyzer_ptr = nullptr |
Hardware-timed 8 bit parallel GPIO capture for ESP32-S3/P4, using the official esp_driver_cam "DVP" camera controller (LCD_CAM peripheral + DMA) with no real camera sensor attached - i.e. capturing raw parallel GPIO levels as if they were pixel data.
Like capture_esp32_i2s.h's I2S0 trick on the original ESP32, this peripheral needs an external pixel clock (PCLK) - there is no self-clocked/master mode. The driver can generate that clock itself on xclk_pin, which you MUST loop back with a jumper wire into pclk_pin. vsync_pin and de_pin are held statically active via internal pull-ups (no real camera sync signals are needed) so the controller just streams continuously for as long as PCLK ticks.
This is a single-shot capture (one "frame" of readCount() bytes per SUMP ARM), not continuous video. No trigger support (same limitation as PicoCapturePIO / CaptureESP32I2S).
REQUIRES PSRAM (real chip present, and enabled in board settings): the driver's DMA path cache-syncs its buffer, which only works for cached external PSRAM, not internal SRAM - without it, capture fails safely (logged, no crash) instead of producing data.
EXPERIMENTAL: the h_res/v_res/vsync semantics of this driver are normally driven by a real camera sensor; tying vsync/de statically high instead of letting them pulse per frame/line is untested beyond basic bring-up.
|
inlineoverridevirtual |
Captures the data and dumps the result.
Implements logic_analyzer::AbstractCapture.
|
inlineoverridevirtual |
Used to masure the speed - capture into memory w/o dump!
Implements logic_analyzer::AbstractCapture.
|
inlineprotected |
(Re)creates the controller - needs to be recreated whenever the requested sample rate (xclk_freq) changes since it's fixed at esp_cam_new_dvp_ctlr() time.