Header only C++ driver for the TLV320AIC3110 audio codec. More...

#include <TLV320AIC3110.h>

Inheritance diagram for TLV320AIC3110:

Classes
struct	RateDivs
	PLL/clock divider settings for a given MCLK/sample-rate combination. More...

struct	RegAddr
	Page + register address pair. More...

Public Member Functions
	TLV320AIC3110 ()

uint8_t	address ()
	Provides the actual I2C address of the codec.

bool	begin (uint32_t mclk=12000000, uint32_t sample_rate=44100, uint8_t word_size=16, bool bclk_master=false)

bool	begin (uint32_t sample_rate, uint8_t bits)
	Initialize the codec: soft reset, configure the PLL/clock dividers for the given MCLK and sample rate, configure the I2S interface, select decimation filters and configure the default output (headphone + speaker) and input (microphone) paths.

bool	begin (uint32_t sample_rate, uint8_t bits, codec_mode_t mode, i2s_format_t fmt, bool is_master, uint8_t channels) override
	Initializes the codec.

bool	configureClocks (uint32_t mclk, uint32_t sample_rate, uint8_t word_size, bool bclk_master)
	Configure the PLL and the NDAC/MDAC/NADC/MADC/(B)OSR clock dividers for the given MCLK and sample rate, using the same divider table as the Zephyr driver. Also configures the BCLK divider if the codec is the I2S bit clock controller.

bool	configureDai (uint8_t word_size, bool bclk_master, bool wclk_master)
	Configure the digital audio interface (I2S) word size and clock direction.

bool	configureFilters (uint32_t sample_rate)
	Select the DAC/ADC decimation filter (processing block) based on sample rate.

bool	configureInput ()
	Configure the microphone input path: power up the ADC, set the microphone bias, unmute the input, set the PGA volume and route both microphone inputs to the PGA.

bool	configureOutput ()
	Configure the headphone and/or speaker output paths (depending on the output device selected via setDevices()): set common mode voltage, enable click/pop removal, route the DAC to the output mixer, set the default analog volume, unmute and power up the corresponding drivers.

virtual int	getInputVolume ()

virtual int	getVolume ()
	Provides the output volume in % (0...100) that was set with setVolume()

i2c_bus_handle_t	getWire ()
	Provides the actual I2C communication object.

virtual bool	isInputVolumeSupported ()
	Returns true if the driver supports setting the input volume, false otherwise. By default we return false, but some drivers (e.g. WM8962) override this to return true.

virtual bool	setActive (codec_mode_t mode)

void	setAddress (uint8_t addr)
	Defines the I2C address of the codec.

bool	setDevices (input_device_t input_device, output_device_t output_device) override
	Stores the output device selection for use by configureOutput()

virtual bool	setInputVolume (int volume)

bool	setMute (bool mute) override
	Mutes/unmutes all outputs.

bool	setOutputMute (bool mute, AIC3110Channel channel=AIC3110Channel::All)
	Mute / unmute the headphone and/or speaker driver(s)

bool	setOutputVolume (int vol, AIC3110Channel channel=AIC3110Channel::All)
	Set the output (headphone / speaker) volume.

bool	setVolume (int volume) override

void	setWire (i2c_bus_handle_t w)
	Defines the I2C communication object.

bool	softReset ()
	Soft reset of the codec.

bool	startOutput ()
	Power up the DAC channels and unmute them.

bool	stopOutput ()
	Mute the DAC channels and power them down.

Static Public Member Functions
static uint8_t	BCLK_DIV (uint8_t val)

static uint8_t	HEADPHONE_DRV_CM (uint8_t val)

static uint8_t	HPX_ANA_VOL (uint8_t val)

static uint8_t	IF_CTRL_IFTYPE (uint8_t val)

static uint8_t	IF_CTRL_WLEN (uint8_t val)

static uint8_t	MADC_DIV (uint8_t val)

static uint8_t	MDAC_DIV (uint8_t val)

static uint8_t	NADC_DIV (uint8_t val)

static uint8_t	NDAC_DIV (uint8_t val)

static uint8_t	PLL_P (uint8_t val)

static uint8_t	PLL_R (uint8_t val)

static uint8_t	SPX_ANA_VOL (uint8_t val)

static uint8_t	TIMER_MCLK_DIV_VAL (uint8_t val)

Static Public Attributes
static constexpr RegAddr	ADC_PROC_BLK_SEL_ADDR {0, 61}

static constexpr RegAddr	AOSR_ADDR {0, 20}

static constexpr RegAddr	BCLK_DIV_ADDR {0, 30}

static constexpr uint8_t	BCLK_DIV_POWER_UP = (1 << 7)

static constexpr uint8_t	BEEP_GEN_EN_BEEP = (1 << 7)

static constexpr RegAddr	BEEP_LEN_LSB_ADDR {0, 75}

static constexpr RegAddr	BEEP_LEN_MIB_ADDR {0, 74}

static constexpr RegAddr	BEEP_LEN_MSB_ADDR {0, 73}

static constexpr RegAddr	CLOCK_GEN_MUX_ADDR {0, 4}

static constexpr uint8_t	CLOCK_GEN_MUX_DEFAULT = 0x3

static constexpr int	CODEC_OUTPUT_VOLUME_MAX = 0
	Output volume range, in 0.5dB steps (-39dB .. 0dB)

static constexpr int	CODEC_OUTPUT_VOLUME_MIN = (-78 * 2)

static constexpr uint8_t	DAC_LR_POWERDN_DEFAULT = (1 << 4) \| (1 << 2)

static constexpr uint8_t	DAC_LR_POWERUP_DEFAULT

static constexpr RegAddr	DAC_PROC_BLK_SEL_ADDR {0, 60}

static constexpr RegAddr	DATA_PATH_SETUP_ADDR {0, 63}

static constexpr RegAddr	DRC_CTRL1_ADDR {0, 68}

static constexpr RegAddr	HEADPHONE_DRV_ADDR {1, 31}

static constexpr uint8_t	HEADPHONE_DRV_CM_MASK = (0x3 << 3)

static constexpr RegAddr	HEADPHONE_DRV_CTRL_ADDR {1, 44}

static constexpr uint8_t	HEADPHONE_DRV_LINEOUT = (1 << 1) \| (1 << 2)

static constexpr uint8_t	HEADPHONE_DRV_POWERUP = (1 << 7) \| (1 << 6)

static constexpr uint8_t	HEADPHONE_DRV_RESERVED = (1 << 2)

static constexpr RegAddr	HP_OUT_POP_RM_ADDR {1, 33}

static constexpr uint8_t	HP_OUT_POP_RM_ENABLE = (1 << 7)

static constexpr RegAddr	HPL_ANA_VOL_CTRL_ADDR {1, 36}

static constexpr RegAddr	HPL_DRV_GAIN_CTRL_ADDR {1, 40}

static constexpr RegAddr	HPR_ANA_VOL_CTRL_ADDR {1, 37}

static constexpr RegAddr	HPR_DRV_GAIN_CTRL_ADDR {1, 41}

static constexpr uint8_t	HPX_ANA_VOL_DEFAULT = 0

static constexpr uint8_t	HPX_ANA_VOL_ENABLE = (1 << 7)

static constexpr uint8_t	HPX_ANA_VOL_FLOOR = 144

static constexpr uint8_t	HPX_ANA_VOL_LOW_THRESH = 105

static constexpr uint8_t	HPX_ANA_VOL_MASK = 0x7F

static constexpr uint8_t	HPX_ANA_VOL_MAX = 0

static constexpr uint8_t	HPX_ANA_VOL_MIN = 127

static constexpr uint8_t	HPX_DRV_RESERVED = (1 << 1)

static constexpr uint8_t	HPX_DRV_UNMUTE = (1 << 2)

static constexpr RegAddr	IF_CTRL1_ADDR {0, 27}

static constexpr uint8_t	IF_CTRL_BCLK_OUT = (1 << 3)

static constexpr uint8_t	IF_CTRL_DOUT_HIGH_Z = (1 << 0)

static constexpr uint8_t	IF_CTRL_IFTYPE_DSP = 1

static constexpr uint8_t	IF_CTRL_IFTYPE_I2S = 0

static constexpr uint8_t	IF_CTRL_IFTYPE_LJF = 3

static constexpr uint8_t	IF_CTRL_IFTYPE_RJF = 2

static constexpr uint8_t	IF_CTRL_WCLK_OUT = (1 << 2)

static constexpr uint8_t	IF_CTRL_WLEN_16 = 0

static constexpr uint8_t	IF_CTRL_WLEN_20 = 1

static constexpr uint8_t	IF_CTRL_WLEN_24 = 2

static constexpr uint8_t	IF_CTRL_WLEN_32 = 3

static constexpr RegAddr	L_BEEP_GEN_ADDR {0, 71}

static constexpr RegAddr	L_DIG_VOL_CTRL_ADDR {0, 65}

static constexpr RegAddr	MADC_DIV_ADDR {0, 19}

static constexpr uint8_t	MADC_DIV_MASK = 0x7F

static constexpr uint8_t	MADC_POWER_UP = (1 << 7)

static constexpr RegAddr	MDAC_DIV_ADDR {0, 12}

static constexpr uint8_t	MDAC_DIV_MASK = 0x7F

static constexpr uint8_t	MDAC_POWER_UP = (1 << 7)

static constexpr RegAddr	MIC_ADC_CTRL_ADDR {0, 81}

static constexpr RegAddr	MIC_ADC_FLAG_ADDR {0, 36}

static constexpr uint8_t	MIC_ADC_POWERUP = (1 << 7)

static constexpr RegAddr	MIC_BIAS_ADDR {1, 46}

static constexpr RegAddr	MIC_CCTRL_ADDR {0, 83}

static constexpr uint8_t	MIC_CCTRL_DEFAULT = 0x0

static constexpr RegAddr	MIC_FCTRL_ADDR {0, 82}

static constexpr uint8_t	MIC_FCTRL_DEFAULT = 0x0

static constexpr RegAddr	MIC_ICM_ADDR {1, 50}

static constexpr RegAddr	MIC_PGA_ADDR {1, 47}

static constexpr uint8_t	MIC_PGA_VOL_DEFAULT = 0x0

static constexpr RegAddr	MIC_PGAMI_ADDR {1, 49}

static constexpr RegAddr	MIC_PGAPI_ADDR {1, 48}

static constexpr uint8_t	MIC_PGAPI_L_DEFAULT = (1 << 7) \| (1 << 6)

static constexpr uint8_t	MIC_PGAPI_R_DEFAULT = (1 << 5) \| (1 << 4)

static constexpr uint8_t	MICBIAS_DEFAULT = (1 << 3) \| (1 << 1)

static constexpr RegAddr	NADC_DIV_ADDR {0, 18}

static constexpr uint8_t	NADC_DIV_MASK = 0x7F

static constexpr uint8_t	NADC_POWER_UP = (1 << 7)

static constexpr RegAddr	NDAC_DIV_ADDR {0, 11}

static constexpr uint8_t	NDAC_DIV_MASK = 0x7F

static constexpr uint8_t	NDAC_POWER_UP = (1 << 7)

static constexpr RegAddr	OSR_LSB_ADDR {0, 14}

static constexpr uint8_t	OSR_LSB_MASK = 0xFF

static constexpr RegAddr	OSR_MSB_ADDR {0, 13}

static constexpr uint8_t	OSR_MSB_MASK = 0x3

static constexpr RegAddr	OUTPUT_ROUTING_ADDR {1, 35}

static constexpr uint8_t	OUTPUT_ROUTING_HPL = (1 << 7)

static constexpr uint8_t	OUTPUT_ROUTING_HPR = (1 << 3)

static constexpr uint8_t	OUTPUT_ROUTING_MIXER = (1 << 6) \| (1 << 2)

static constexpr RegAddr	OVF_FLAG_ADDR {0, 39}

static constexpr RegAddr	PLL_D_LSB_ADDR {0, 8}

static constexpr RegAddr	PLL_D_MSB_ADDR {0, 7}

static constexpr RegAddr	PLL_J_ADDR {0, 6}

static constexpr uint8_t	PLL_P_MASK = 0x7

static constexpr RegAddr	PLL_P_R_ADDR {0, 5}

static constexpr uint8_t	PLL_POWER_UP = (1 << 7)

static constexpr uint8_t	PLL_R_MASK = 0xF

static constexpr RegAddr	R_BEEP_GEN_ADDR {0, 72}

static constexpr RegAddr	SOFT_RESET_ADDR {0, 1}

static constexpr uint8_t	SOFT_RESET_ASSERT = 1

static constexpr RegAddr	SPEAKER_DRV_ADDR {1, 32}

static constexpr uint8_t	SPEAKER_DRV_POWERUP = (1 << 7) \| (1 << 6)

static constexpr uint8_t	SPEAKER_DRV_RESERVED = (1 << 2) \| (1 << 1)

static constexpr RegAddr	SPL_ANA_VOL_CTRL_ADDR {1, 38}

static constexpr RegAddr	SPL_DRV_GAIN_CTRL_ADDR {1, 42}

static constexpr RegAddr	SPR_ANA_VOL_CTRL_ADDR {1, 39}

static constexpr RegAddr	SPR_DRV_GAIN_CTRL_ADDR {1, 43}

static constexpr uint8_t	SPX_ANA_VOL_DEFAULT = 0

static constexpr uint8_t	SPX_ANA_VOL_ENABLE = (1 << 7)

static constexpr uint8_t	SPX_ANA_VOL_FLOOR = 144

static constexpr uint8_t	SPX_ANA_VOL_LOW_THRESH = 105

static constexpr uint8_t	SPX_ANA_VOL_MASK = 0x7F

static constexpr uint8_t	SPX_DRV_RESERVED = (1 << 1)

static constexpr uint8_t	SPX_DRV_UNMUTE = (1 << 2)

static constexpr RegAddr	TIMER_MCLK_DIV_ADDR {3, 16}

static constexpr uint8_t	TIMER_MCLK_DIV_EN_EXT = (1 << 7)

static constexpr uint8_t	TIMER_MCLK_DIV_MASK = 0x7F

static constexpr RegAddr	VOL_CTRL_ADDR {0, 64}

static constexpr uint8_t	VOL_CTRL_MUTE_DEFAULT = (1 << 3) \| (1 << 2)

static constexpr uint8_t	VOL_CTRL_UNMUTE_DEFAULT = 0

Protected Member Functions
bool	readPagedReg (RegAddr reg, uint8_t &value)
	Reads a register on the given page.

bool	readReg (uint8_t reg, uint8_t &value)
	Reads a single byte from an 8 bit register address.

bool	readReg16 (uint8_t reg, uint16_t &value)
	Reads a 16 bit (big endian) value from an 8 bit register address.

bool	selectPage (uint8_t page)
	Selects the active register page (writes register 0 of page 0)

bool	updatePagedReg (RegAddr reg, uint8_t mask, uint8_t value)
	Read-Modify-Write of a register on the given page.

bool	updateReg (uint8_t reg, uint8_t mask, uint8_t value)
	Read-Modify-Write of a single byte register.

bool	updateReg16 (uint8_t reg, uint16_t mask, uint16_t value)
	Read-Modify-Write of a 16 bit (big endian) register.

bool	writePagedReg (RegAddr reg, uint8_t value)
	Writes a register on the given page.

bool	writeReg (uint8_t reg, uint8_t value)
	Writes a single byte to an 8 bit register address.

bool	writeReg16 (uint8_t reg, uint16_t value)
	Writes a 16 bit (big endian) value to an 8 bit register address.

Static Protected Member Functions
static const RateDivs *	pllDivTable (size_t &count)
	PLL/clock divider table indexed by (mclk, sample rate)

Protected Attributes
uint8_t	current_page = 0xFF

uint8_t	i2c_addr = 0

int	input_volume_percent = 100
	Last input volume (in %) provided to setInputVolume()

output_device_t	output_device = DAC_OUTPUT_ALL
	Output device selection set via setDevices(), used by configureOutput()

int	volume_percent = 100
	Last volume (in %) provided to setVolume()

i2c_bus_handle_t	wire = nullptr

Static Protected Attributes
static constexpr uint8_t	PAGE_CONTROL_ADDR = 0

Detailed Description

Header only C++ driver for the TLV320AIC3110 audio codec.

The TLV320AIC3110 uses a paged 8 bit register map (page select register at page 0 / register 0). Provides soft reset, PLL/clock configuration (based on a fixed MCLK/sample-rate divider table), DAI (I2S) format configuration, decimation filter selection and output/input path configuration including volume and mute control.

Constructor & Destructor Documentation

◆ TLV320AIC3110()

TLV320AIC3110 ( )

inline

Member Function Documentation

◆ address()

uint8_t address ( )

inlineinherited

Provides the actual I2C address of the codec.

◆ BCLK_DIV()

static uint8_t BCLK_DIV ( uint8_t val )

inlinestatic

◆ begin() [1/3]

bool begin	(	uint32_t	mclk = `12000000`,
		uint32_t	sample_rate = `44100`,
		uint8_t	word_size = `16`,
		bool	bclk_master = `false`
	)

inline

◆ begin() [2/3]

bool begin	(	uint32_t	sample_rate,
		uint8_t	bits
	)

inline

Initialize the codec: soft reset, configure the PLL/clock dividers for the given MCLK and sample rate, configure the I2S interface, select decimation filters and configure the default output (headphone + speaker) and input (microphone) paths.

Parameters

mclk	master clock frequency in Hz (must match an entry in the internal PLL divider table, e.g. 12000000, 24000000, 25000000)
sample_rate	I2S sample rate in Hz (8000 .. 192000)
word_size	I2S word size in bits (16, 20, 24, 32)
bclk_master	true if the codec generates BCLK (controller mode) Initializes the codec for I2S with the given sample rate and bits per sample

◆ begin() [3/3]

bool begin	(	uint32_t	sample_rate,
		uint8_t	bits,
		codec_mode_t	mode,
		i2s_format_t	fmt,
		bool	is_master,
		uint8_t	channels
	)

inlineoverridevirtual

Initializes the codec.

Implements ZephyrDriverCommon.

◆ configureClocks()

bool configureClocks	(	uint32_t	mclk,
		uint32_t	sample_rate,
		uint8_t	word_size,
		bool	bclk_master
	)

inline

Configure the PLL and the NDAC/MDAC/NADC/MADC/(B)OSR clock dividers for the given MCLK and sample rate, using the same divider table as the Zephyr driver. Also configures the BCLK divider if the codec is the I2S bit clock controller.

◆ configureDai()

bool configureDai	(	uint8_t	word_size,
		bool	bclk_master,
		bool	wclk_master
	)

inline

Configure the digital audio interface (I2S) word size and clock direction.

◆ configureFilters()

bool configureFilters ( uint32_t sample_rate )

inline

Select the DAC/ADC decimation filter (processing block) based on sample rate.

◆ configureInput()

bool configureInput ( )

inline

Configure the microphone input path: power up the ADC, set the microphone bias, unmute the input, set the PGA volume and route both microphone inputs to the PGA.

◆ configureOutput()

bool configureOutput ( )

inline

Configure the headphone and/or speaker output paths (depending on the output device selected via setDevices()): set common mode voltage, enable click/pop removal, route the DAC to the output mixer, set the default analog volume, unmute and power up the corresponding drivers.

◆ getInputVolume()

virtual int getInputVolume ( )

inlinevirtualinherited

Provides the input volume in % (0...100) that was set with setInputVolume()

◆ getVolume()

virtual int getVolume ( )

inlinevirtualinherited

Provides the output volume in % (0...100) that was set with setVolume()

◆ getWire()

i2c_bus_handle_t getWire ( )

inlineinherited

Provides the actual I2C communication object.

◆ HEADPHONE_DRV_CM()

static uint8_t HEADPHONE_DRV_CM ( uint8_t val )

inlinestatic

◆ HPX_ANA_VOL()

static uint8_t HPX_ANA_VOL ( uint8_t val )

inlinestatic

◆ IF_CTRL_IFTYPE()

static uint8_t IF_CTRL_IFTYPE ( uint8_t val )

inlinestatic

◆ IF_CTRL_WLEN()

static uint8_t IF_CTRL_WLEN ( uint8_t val )

inlinestatic

◆ isInputVolumeSupported()

virtual bool isInputVolumeSupported ( )

inlinevirtualinherited

Returns true if the driver supports setting the input volume, false otherwise. By default we return false, but some drivers (e.g. WM8962) override this to return true.

Reimplemented in DA7212, WM8904, and WM8962.

◆ MADC_DIV()

static uint8_t MADC_DIV ( uint8_t val )

inlinestatic

◆ MDAC_DIV()

static uint8_t MDAC_DIV ( uint8_t val )

inlinestatic

◆ NADC_DIV()

static uint8_t NADC_DIV ( uint8_t val )

inlinestatic

◆ NDAC_DIV()

static uint8_t NDAC_DIV ( uint8_t val )

inlinestatic

◆ PLL_P()

static uint8_t PLL_P ( uint8_t val )

inlinestatic

◆ PLL_R()

static uint8_t PLL_R ( uint8_t val )

inlinestatic

◆ pllDivTable()

static const RateDivs * pllDivTable ( size_t & count )

inlinestaticprotected

PLL/clock divider table indexed by (mclk, sample rate)

◆ readPagedReg()

bool readPagedReg	(	RegAddr	reg,
		uint8_t &	value
	)

inlineprotected

Reads a register on the given page.

◆ readReg()

bool readReg	(	uint8_t	reg,
		uint8_t &	value
	)

inlineprotectedinherited

Reads a single byte from an 8 bit register address.

◆ readReg16()

bool readReg16	(	uint8_t	reg,
		uint16_t &	value
	)

inlineprotectedinherited

Reads a 16 bit (big endian) value from an 8 bit register address.

◆ selectPage()

bool selectPage ( uint8_t page )

inlineprotected

Selects the active register page (writes register 0 of page 0)

◆ setActive()

virtual bool setActive ( codec_mode_t mode )

inlinevirtualinherited

Activates/deactivates the playback and/or capture path at runtime (without reconfiguring the codec), based on codec_mode_t (CODEC_MODE_DECODE: playback active, CODEC_MODE_ENCODE: capture active). By default this just mutes/unmutes all outputs depending on CODEC_MODE_DECODE; chip specific subclasses that support muting the input path independently override this to also mute/unmute the capture path depending on CODEC_MODE_ENCODE.

Reimplemented in DA7212, WM8904, and WM8962.

◆ setAddress()

void setAddress ( uint8_t addr )

inlineinherited

Defines the I2C address of the codec.

◆ setDevices()

bool setDevices	(	input_device_t	input_device,
		output_device_t	output_device
	)

inlineoverridevirtual

Stores the output device selection for use by configureOutput()

Reimplemented from ZephyrDriverCommon.

◆ setInputVolume()

virtual bool setInputVolume ( int volume )

inlinevirtualinherited

Defines the input volume in % (0...100). Chip specific subclasses map this to their native input volume range.

Reimplemented in DA7212, WM8904, and WM8962.

◆ setMute()

bool setMute ( bool mute )

inlineoverridevirtual

Mutes/unmutes all outputs.

Reimplemented from ZephyrDriverCommon.

◆ setOutputMute()

bool setOutputMute	(	bool	mute,
		AIC3110Channel	channel = `AIC3110Channel::All`
	)

inline

Mute / unmute the headphone and/or speaker driver(s)

◆ setOutputVolume()

bool setOutputVolume	(	int	vol,
		AIC3110Channel	channel = `AIC3110Channel::All`
	)

inline

Set the output (headphone / speaker) volume.

Parameters

vol	volume in 0.5dB steps, range CODEC_OUTPUT_VOLUME_MIN (-156, i.e. -78dB) .. CODEC_OUTPUT_VOLUME_MAX (0, i.e. 0dB)
channel	target channel(s)

◆ setVolume()

bool setVolume ( int volume )

inlineoverridevirtual

Sets the output volume in % (0...100) for all channels, mapped to [CODEC_OUTPUT_VOLUME_MIN..CODEC_OUTPUT_VOLUME_MAX] (0.5dB steps)

Reimplemented from ZephyrDriverCommon.

◆ setWire()

void setWire ( i2c_bus_handle_t w )

inlineinherited

Defines the I2C communication object.

◆ softReset()

bool softReset ( )

inline

Soft reset of the codec.

◆ SPX_ANA_VOL()

static uint8_t SPX_ANA_VOL ( uint8_t val )

inlinestatic

◆ startOutput()

bool startOutput ( )

inline

Power up the DAC channels and unmute them.

◆ stopOutput()

bool stopOutput ( )

inline

Mute the DAC channels and power them down.

◆ TIMER_MCLK_DIV_VAL()

static uint8_t TIMER_MCLK_DIV_VAL ( uint8_t val )

inlinestatic

◆ updatePagedReg()

bool updatePagedReg	(	RegAddr	reg,
		uint8_t	mask,
		uint8_t	value
	)

inlineprotected

Read-Modify-Write of a register on the given page.

◆ updateReg()

bool updateReg	(	uint8_t	reg,
		uint8_t	mask,
		uint8_t	value
	)

inlineprotectedinherited

Read-Modify-Write of a single byte register.

◆ updateReg16()

bool updateReg16	(	uint8_t	reg,
		uint16_t	mask,
		uint16_t	value
	)

inlineprotectedinherited

Read-Modify-Write of a 16 bit (big endian) register.

◆ writePagedReg()

bool writePagedReg	(	RegAddr	reg,
		uint8_t	value
	)

inlineprotected

Writes a register on the given page.

◆ writeReg()

bool writeReg	(	uint8_t	reg,
		uint8_t	value
	)

inlineprotectedinherited

Writes a single byte to an 8 bit register address.

◆ writeReg16()

bool writeReg16	(	uint8_t	reg,
		uint16_t	value
	)

inlineprotectedinherited

Writes a 16 bit (big endian) value to an 8 bit register address.

Member Data Documentation

◆ ADC_PROC_BLK_SEL_ADDR

constexpr RegAddr ADC_PROC_BLK_SEL_ADDR {0, 61}

staticconstexpr

◆ AOSR_ADDR

constexpr RegAddr AOSR_ADDR {0, 20}

staticconstexpr

◆ BCLK_DIV_ADDR

constexpr RegAddr BCLK_DIV_ADDR {0, 30}

staticconstexpr

◆ BCLK_DIV_POWER_UP

constexpr uint8_t BCLK_DIV_POWER_UP = (1 << 7)

staticconstexpr

◆ BEEP_GEN_EN_BEEP

constexpr uint8_t BEEP_GEN_EN_BEEP = (1 << 7)

staticconstexpr

◆ BEEP_LEN_LSB_ADDR

constexpr RegAddr BEEP_LEN_LSB_ADDR {0, 75}

staticconstexpr

◆ BEEP_LEN_MIB_ADDR

constexpr RegAddr BEEP_LEN_MIB_ADDR {0, 74}

staticconstexpr

◆ BEEP_LEN_MSB_ADDR

constexpr RegAddr BEEP_LEN_MSB_ADDR {0, 73}

staticconstexpr

◆ CLOCK_GEN_MUX_ADDR

constexpr RegAddr CLOCK_GEN_MUX_ADDR {0, 4}

staticconstexpr

◆ CLOCK_GEN_MUX_DEFAULT

constexpr uint8_t CLOCK_GEN_MUX_DEFAULT = 0x3

staticconstexpr

◆ CODEC_OUTPUT_VOLUME_MAX

constexpr int CODEC_OUTPUT_VOLUME_MAX = 0

staticconstexpr

Output volume range, in 0.5dB steps (-39dB .. 0dB)

◆ CODEC_OUTPUT_VOLUME_MIN

constexpr int CODEC_OUTPUT_VOLUME_MIN = (-78 * 2)

staticconstexpr

◆ current_page

uint8_t current_page = 0xFF

protected

cached page, invalid initially

◆ DAC_LR_POWERDN_DEFAULT

constexpr uint8_t DAC_LR_POWERDN_DEFAULT = (1 << 4) | (1 << 2)

staticconstexpr

◆ DAC_LR_POWERUP_DEFAULT

constexpr uint8_t DAC_LR_POWERUP_DEFAULT

staticconstexpr

Initial value:

=

(1 << 7) | (1 << 6) | (1 << 4) | (1 << 2)

◆ DAC_PROC_BLK_SEL_ADDR

constexpr RegAddr DAC_PROC_BLK_SEL_ADDR {0, 60}

staticconstexpr

◆ DATA_PATH_SETUP_ADDR

constexpr RegAddr DATA_PATH_SETUP_ADDR {0, 63}

staticconstexpr

◆ DRC_CTRL1_ADDR

constexpr RegAddr DRC_CTRL1_ADDR {0, 68}

staticconstexpr

◆ HEADPHONE_DRV_ADDR

constexpr RegAddr HEADPHONE_DRV_ADDR {1, 31}

staticconstexpr

◆ HEADPHONE_DRV_CM_MASK

constexpr uint8_t HEADPHONE_DRV_CM_MASK = (0x3 << 3)

staticconstexpr

◆ HEADPHONE_DRV_CTRL_ADDR

constexpr RegAddr HEADPHONE_DRV_CTRL_ADDR {1, 44}

staticconstexpr

◆ HEADPHONE_DRV_LINEOUT

constexpr uint8_t HEADPHONE_DRV_LINEOUT = (1 << 1) | (1 << 2)

staticconstexpr

◆ HEADPHONE_DRV_POWERUP

constexpr uint8_t HEADPHONE_DRV_POWERUP = (1 << 7) | (1 << 6)

staticconstexpr

◆ HEADPHONE_DRV_RESERVED

constexpr uint8_t HEADPHONE_DRV_RESERVED = (1 << 2)

staticconstexpr

◆ HP_OUT_POP_RM_ADDR

constexpr RegAddr HP_OUT_POP_RM_ADDR {1, 33}

staticconstexpr

◆ HP_OUT_POP_RM_ENABLE

constexpr uint8_t HP_OUT_POP_RM_ENABLE = (1 << 7)

staticconstexpr

◆ HPL_ANA_VOL_CTRL_ADDR

constexpr RegAddr HPL_ANA_VOL_CTRL_ADDR {1, 36}

staticconstexpr

◆ HPL_DRV_GAIN_CTRL_ADDR

constexpr RegAddr HPL_DRV_GAIN_CTRL_ADDR {1, 40}

staticconstexpr

◆ HPR_ANA_VOL_CTRL_ADDR

constexpr RegAddr HPR_ANA_VOL_CTRL_ADDR {1, 37}

staticconstexpr

◆ HPR_DRV_GAIN_CTRL_ADDR

constexpr RegAddr HPR_DRV_GAIN_CTRL_ADDR {1, 41}

staticconstexpr

◆ HPX_ANA_VOL_DEFAULT

constexpr uint8_t HPX_ANA_VOL_DEFAULT = 0

staticconstexpr

◆ HPX_ANA_VOL_ENABLE

constexpr uint8_t HPX_ANA_VOL_ENABLE = (1 << 7)

staticconstexpr

◆ HPX_ANA_VOL_FLOOR

constexpr uint8_t HPX_ANA_VOL_FLOOR = 144

staticconstexpr

◆ HPX_ANA_VOL_LOW_THRESH

constexpr uint8_t HPX_ANA_VOL_LOW_THRESH = 105

staticconstexpr

◆ HPX_ANA_VOL_MASK

constexpr uint8_t HPX_ANA_VOL_MASK = 0x7F

staticconstexpr

◆ HPX_ANA_VOL_MAX

constexpr uint8_t HPX_ANA_VOL_MAX = 0

staticconstexpr

◆ HPX_ANA_VOL_MIN

constexpr uint8_t HPX_ANA_VOL_MIN = 127

staticconstexpr

◆ HPX_DRV_RESERVED

constexpr uint8_t HPX_DRV_RESERVED = (1 << 1)

staticconstexpr

◆ HPX_DRV_UNMUTE

constexpr uint8_t HPX_DRV_UNMUTE = (1 << 2)

staticconstexpr

◆ i2c_addr

uint8_t i2c_addr = 0

protectedinherited

◆ IF_CTRL1_ADDR

constexpr RegAddr IF_CTRL1_ADDR {0, 27}

staticconstexpr

◆ IF_CTRL_BCLK_OUT

constexpr uint8_t IF_CTRL_BCLK_OUT = (1 << 3)

staticconstexpr

◆ IF_CTRL_DOUT_HIGH_Z

constexpr uint8_t IF_CTRL_DOUT_HIGH_Z = (1 << 0)

staticconstexpr

◆ IF_CTRL_IFTYPE_DSP

constexpr uint8_t IF_CTRL_IFTYPE_DSP = 1

staticconstexpr

◆ IF_CTRL_IFTYPE_I2S

constexpr uint8_t IF_CTRL_IFTYPE_I2S = 0

staticconstexpr

◆ IF_CTRL_IFTYPE_LJF

constexpr uint8_t IF_CTRL_IFTYPE_LJF = 3

staticconstexpr

◆ IF_CTRL_IFTYPE_RJF

constexpr uint8_t IF_CTRL_IFTYPE_RJF = 2

staticconstexpr

◆ IF_CTRL_WCLK_OUT

constexpr uint8_t IF_CTRL_WCLK_OUT = (1 << 2)

staticconstexpr

◆ IF_CTRL_WLEN_16

constexpr uint8_t IF_CTRL_WLEN_16 = 0

staticconstexpr

◆ IF_CTRL_WLEN_20

constexpr uint8_t IF_CTRL_WLEN_20 = 1

staticconstexpr

◆ IF_CTRL_WLEN_24

constexpr uint8_t IF_CTRL_WLEN_24 = 2

staticconstexpr

◆ IF_CTRL_WLEN_32

constexpr uint8_t IF_CTRL_WLEN_32 = 3

staticconstexpr

◆ input_volume_percent

int input_volume_percent = 100

protectedinherited

Last input volume (in %) provided to setInputVolume()

◆ L_BEEP_GEN_ADDR

constexpr RegAddr L_BEEP_GEN_ADDR {0, 71}

staticconstexpr

◆ L_DIG_VOL_CTRL_ADDR

constexpr RegAddr L_DIG_VOL_CTRL_ADDR {0, 65}

staticconstexpr

◆ MADC_DIV_ADDR

constexpr RegAddr MADC_DIV_ADDR {0, 19}

staticconstexpr

◆ MADC_DIV_MASK

constexpr uint8_t MADC_DIV_MASK = 0x7F

staticconstexpr

◆ MADC_POWER_UP

constexpr uint8_t MADC_POWER_UP = (1 << 7)

staticconstexpr

◆ MDAC_DIV_ADDR

constexpr RegAddr MDAC_DIV_ADDR {0, 12}

staticconstexpr

◆ MDAC_DIV_MASK

constexpr uint8_t MDAC_DIV_MASK = 0x7F

staticconstexpr

◆ MDAC_POWER_UP

constexpr uint8_t MDAC_POWER_UP = (1 << 7)

staticconstexpr

◆ MIC_ADC_CTRL_ADDR

constexpr RegAddr MIC_ADC_CTRL_ADDR {0, 81}

staticconstexpr

◆ MIC_ADC_FLAG_ADDR

constexpr RegAddr MIC_ADC_FLAG_ADDR {0, 36}

staticconstexpr

◆ MIC_ADC_POWERUP

constexpr uint8_t MIC_ADC_POWERUP = (1 << 7)

staticconstexpr

◆ MIC_BIAS_ADDR

constexpr RegAddr MIC_BIAS_ADDR {1, 46}

staticconstexpr

◆ MIC_CCTRL_ADDR

constexpr RegAddr MIC_CCTRL_ADDR {0, 83}

staticconstexpr

◆ MIC_CCTRL_DEFAULT

constexpr uint8_t MIC_CCTRL_DEFAULT = 0x0

staticconstexpr

◆ MIC_FCTRL_ADDR

constexpr RegAddr MIC_FCTRL_ADDR {0, 82}

staticconstexpr

◆ MIC_FCTRL_DEFAULT

constexpr uint8_t MIC_FCTRL_DEFAULT = 0x0

staticconstexpr

◆ MIC_ICM_ADDR

constexpr RegAddr MIC_ICM_ADDR {1, 50}

staticconstexpr

◆ MIC_PGA_ADDR

constexpr RegAddr MIC_PGA_ADDR {1, 47}

staticconstexpr

◆ MIC_PGA_VOL_DEFAULT

constexpr uint8_t MIC_PGA_VOL_DEFAULT = 0x0

staticconstexpr

◆ MIC_PGAMI_ADDR

constexpr RegAddr MIC_PGAMI_ADDR {1, 49}

staticconstexpr

◆ MIC_PGAPI_ADDR

constexpr RegAddr MIC_PGAPI_ADDR {1, 48}

staticconstexpr

◆ MIC_PGAPI_L_DEFAULT

constexpr uint8_t MIC_PGAPI_L_DEFAULT = (1 << 7) | (1 << 6)

staticconstexpr

◆ MIC_PGAPI_R_DEFAULT

constexpr uint8_t MIC_PGAPI_R_DEFAULT = (1 << 5) | (1 << 4)

staticconstexpr

◆ MICBIAS_DEFAULT

constexpr uint8_t MICBIAS_DEFAULT = (1 << 3) | (1 << 1)

staticconstexpr

◆ NADC_DIV_ADDR

constexpr RegAddr NADC_DIV_ADDR {0, 18}

staticconstexpr

◆ NADC_DIV_MASK

constexpr uint8_t NADC_DIV_MASK = 0x7F

staticconstexpr

◆ NADC_POWER_UP

constexpr uint8_t NADC_POWER_UP = (1 << 7)

staticconstexpr

◆ NDAC_DIV_ADDR

constexpr RegAddr NDAC_DIV_ADDR {0, 11}

staticconstexpr

◆ NDAC_DIV_MASK

constexpr uint8_t NDAC_DIV_MASK = 0x7F

staticconstexpr

◆ NDAC_POWER_UP

constexpr uint8_t NDAC_POWER_UP = (1 << 7)

staticconstexpr

◆ OSR_LSB_ADDR

constexpr RegAddr OSR_LSB_ADDR {0, 14}

staticconstexpr

◆ OSR_LSB_MASK

constexpr uint8_t OSR_LSB_MASK = 0xFF

staticconstexpr

◆ OSR_MSB_ADDR

constexpr RegAddr OSR_MSB_ADDR {0, 13}

staticconstexpr

◆ OSR_MSB_MASK

constexpr uint8_t OSR_MSB_MASK = 0x3

staticconstexpr

◆ output_device

output_device_t output_device = DAC_OUTPUT_ALL

protected

Output device selection set via setDevices(), used by configureOutput()

◆ OUTPUT_ROUTING_ADDR

constexpr RegAddr OUTPUT_ROUTING_ADDR {1, 35}

staticconstexpr

◆ OUTPUT_ROUTING_HPL

constexpr uint8_t OUTPUT_ROUTING_HPL = (1 << 7)

staticconstexpr

◆ OUTPUT_ROUTING_HPR

constexpr uint8_t OUTPUT_ROUTING_HPR = (1 << 3)

staticconstexpr

◆ OUTPUT_ROUTING_MIXER

constexpr uint8_t OUTPUT_ROUTING_MIXER = (1 << 6) | (1 << 2)

staticconstexpr

◆ OVF_FLAG_ADDR

constexpr RegAddr OVF_FLAG_ADDR {0, 39}

staticconstexpr

◆ PAGE_CONTROL_ADDR

constexpr uint8_t PAGE_CONTROL_ADDR = 0

staticconstexprprotected

◆ PLL_D_LSB_ADDR

constexpr RegAddr PLL_D_LSB_ADDR {0, 8}

staticconstexpr

◆ PLL_D_MSB_ADDR

constexpr RegAddr PLL_D_MSB_ADDR {0, 7}

staticconstexpr

◆ PLL_J_ADDR

constexpr RegAddr PLL_J_ADDR {0, 6}

staticconstexpr

◆ PLL_P_MASK

constexpr uint8_t PLL_P_MASK = 0x7

staticconstexpr

◆ PLL_P_R_ADDR

constexpr RegAddr PLL_P_R_ADDR {0, 5}

staticconstexpr

◆ PLL_POWER_UP

constexpr uint8_t PLL_POWER_UP = (1 << 7)

staticconstexpr

◆ PLL_R_MASK

constexpr uint8_t PLL_R_MASK = 0xF

staticconstexpr

◆ R_BEEP_GEN_ADDR

constexpr RegAddr R_BEEP_GEN_ADDR {0, 72}

staticconstexpr

◆ SOFT_RESET_ADDR

constexpr RegAddr SOFT_RESET_ADDR {0, 1}

staticconstexpr

◆ SOFT_RESET_ASSERT

constexpr uint8_t SOFT_RESET_ASSERT = 1

staticconstexpr

◆ SPEAKER_DRV_ADDR

constexpr RegAddr SPEAKER_DRV_ADDR {1, 32}

staticconstexpr

◆ SPEAKER_DRV_POWERUP

constexpr uint8_t SPEAKER_DRV_POWERUP = (1 << 7) | (1 << 6)

staticconstexpr

◆ SPEAKER_DRV_RESERVED

constexpr uint8_t SPEAKER_DRV_RESERVED = (1 << 2) | (1 << 1)

staticconstexpr

◆ SPL_ANA_VOL_CTRL_ADDR

constexpr RegAddr SPL_ANA_VOL_CTRL_ADDR {1, 38}

staticconstexpr

◆ SPL_DRV_GAIN_CTRL_ADDR

constexpr RegAddr SPL_DRV_GAIN_CTRL_ADDR {1, 42}

staticconstexpr

◆ SPR_ANA_VOL_CTRL_ADDR

constexpr RegAddr SPR_ANA_VOL_CTRL_ADDR {1, 39}

staticconstexpr

◆ SPR_DRV_GAIN_CTRL_ADDR

constexpr RegAddr SPR_DRV_GAIN_CTRL_ADDR {1, 43}

staticconstexpr

◆ SPX_ANA_VOL_DEFAULT

constexpr uint8_t SPX_ANA_VOL_DEFAULT = 0

staticconstexpr

◆ SPX_ANA_VOL_ENABLE

constexpr uint8_t SPX_ANA_VOL_ENABLE = (1 << 7)

staticconstexpr

◆ SPX_ANA_VOL_FLOOR

constexpr uint8_t SPX_ANA_VOL_FLOOR = 144

staticconstexpr

◆ SPX_ANA_VOL_LOW_THRESH

constexpr uint8_t SPX_ANA_VOL_LOW_THRESH = 105

staticconstexpr

◆ SPX_ANA_VOL_MASK

constexpr uint8_t SPX_ANA_VOL_MASK = 0x7F

staticconstexpr

◆ SPX_DRV_RESERVED

constexpr uint8_t SPX_DRV_RESERVED = (1 << 1)

staticconstexpr

◆ SPX_DRV_UNMUTE

constexpr uint8_t SPX_DRV_UNMUTE = (1 << 2)

staticconstexpr

◆ TIMER_MCLK_DIV_ADDR

constexpr RegAddr TIMER_MCLK_DIV_ADDR {3, 16}

staticconstexpr

◆ TIMER_MCLK_DIV_EN_EXT

constexpr uint8_t TIMER_MCLK_DIV_EN_EXT = (1 << 7)

staticconstexpr

◆ TIMER_MCLK_DIV_MASK

constexpr uint8_t TIMER_MCLK_DIV_MASK = 0x7F

staticconstexpr

◆ VOL_CTRL_ADDR

constexpr RegAddr VOL_CTRL_ADDR {0, 64}

staticconstexpr

◆ VOL_CTRL_MUTE_DEFAULT

constexpr uint8_t VOL_CTRL_MUTE_DEFAULT = (1 << 3) | (1 << 2)

staticconstexpr

◆ VOL_CTRL_UNMUTE_DEFAULT

constexpr uint8_t VOL_CTRL_UNMUTE_DEFAULT = 0

staticconstexpr

◆ volume_percent

int volume_percent = 100

protectedinherited

Last volume (in %) provided to setVolume()

◆ wire

i2c_bus_handle_t wire = nullptr

protectedinherited

The documentation for this class was generated from the following file:

src/Codecs/tlv320aic3110/TLV320AIC3110.h

Classes

Public Member Functions

Static Public Member Functions

Static Public Attributes

Protected Member Functions

Static Protected Member Functions

Protected Attributes

Static Protected Attributes

Detailed Description

Constructor & Destructor Documentation

◆ TLV320AIC3110()

Member Function Documentation

◆ address()

◆ BCLK_DIV()

◆ begin() [1/3]

◆ begin() [2/3]

◆ begin() [3/3]

◆ configureClocks()

◆ configureDai()

◆ configureFilters()

◆ configureInput()

◆ configureOutput()

◆ getInputVolume()

◆ getVolume()

◆ getWire()

◆ HEADPHONE_DRV_CM()

◆ HPX_ANA_VOL()

◆ IF_CTRL_IFTYPE()

◆ IF_CTRL_WLEN()

◆ isInputVolumeSupported()

◆ MADC_DIV()

◆ MDAC_DIV()

◆ NADC_DIV()

◆ NDAC_DIV()

◆ PLL_P()

◆ PLL_R()

◆ pllDivTable()

◆ readPagedReg()

◆ readReg()

◆ readReg16()

◆ selectPage()

◆ setActive()

◆ setAddress()

◆ setDevices()

◆ setInputVolume()

◆ setMute()

◆ setOutputMute()

◆ setOutputVolume()

◆ setVolume()

◆ setWire()

◆ softReset()

◆ SPX_ANA_VOL()

◆ startOutput()

◆ stopOutput()

◆ TIMER_MCLK_DIV_VAL()

◆ updatePagedReg()

◆ updateReg()

◆ updateReg16()

◆ writePagedReg()

◆ writeReg()

◆ writeReg16()

Member Data Documentation

◆ ADC_PROC_BLK_SEL_ADDR

◆ AOSR_ADDR

◆ BCLK_DIV_ADDR

◆ BCLK_DIV_POWER_UP

◆ BEEP_GEN_EN_BEEP

◆ BEEP_LEN_LSB_ADDR

◆ BEEP_LEN_MIB_ADDR

◆ BEEP_LEN_MSB_ADDR

◆ CLOCK_GEN_MUX_ADDR

◆ CLOCK_GEN_MUX_DEFAULT

◆ CODEC_OUTPUT_VOLUME_MAX

◆ CODEC_OUTPUT_VOLUME_MIN

◆ current_page

◆ DAC_LR_POWERDN_DEFAULT

◆ DAC_LR_POWERUP_DEFAULT

◆ DAC_PROC_BLK_SEL_ADDR

◆ DATA_PATH_SETUP_ADDR

◆ DRC_CTRL1_ADDR