arduino-audio-driver
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Classes | Public Member Functions | Static Public Member Functions | Static Public Attributes | Protected Member Functions | Static Protected Member Functions | Protected Attributes | Static Protected Attributes | List of all members
TLV320AIC3104 Class Reference

Header only C++ driver for the TLV320AIC3104 audio codec. More...

#include <TLV320AIC3104.h>

Inheritance diagram for TLV320AIC3104:
ZephyrDriverCommon

Classes

struct  PllDivs
 
struct  RateDivs
 
struct  RegAddr
 Page + register address pair. More...
 

Public Member Functions

 TLV320AIC3104 ()
 
uint8_t address ()
 Provides the actual I2C address of the codec.
 
bool begin (uint32_t sample_rate, uint8_t bits, codec_mode_t mode, i2s_format_t fmt, bool is_master, uint8_t channels) override
 Initializes the codec for I2S with the given sample rate and bits per sample.
 
bool begin (uint32_t sample_rate=44100, uint8_t word_size=16, uint8_t channels=2, bool is_master=false, uint32_t mclk=0)
 
bool configureClocks (uint32_t sample_rate, uint8_t word_size, uint8_t channels, uint32_t mclk, bool is_master)
 Configure the PLL for the given MCLK/fS(ref) combination, then set the shared ADC/DAC NCODEC divider (and dual-rate mode) needed to reach the requested sample rate from that fS(ref).
 
bool configureDai (uint8_t word_size)
 Configure the digital audio interface (I2S) word size and clock direction.
 
bool configureInput ()
 Configure the microphone/line input path to the Left/Right ADC PGA at 0dB and power up the ADC channels, set the microphone bias, and set the ADC PGA to its default gain, unmuted. ADC_INPUT_DIFFERENCE: Balanced inputs on Line1/Mic1, with Mic gain. ADC_INPUT_LINE1: Single ended inputs on Line1/Mic1, Line leve. ADC_INPUT_LINE2: Single ended inputs on Line2/Mic2, Line level ADC_INPUT_LINE3: Single ended inputs on Line2/Mic2, Mic gain. ADC_INPUT_ALL: Singled ended line inputs on Line1, Single ended mono Mic input on Mic2, Line2 off. No cross-mixing (eg: left to right)
 
bool configureOutput ()
 Configure the headphone (HPLOUT/HPROUT) and/or fully differential line (LOP/M) output paths, depending on the output device selected via setDevices(): power up the DAC, route the DAC output to the selected mixer(s) at default (0dB) volume, unmute and power up the corresponding output drivers.
 
virtual int getInputVolume ()
 
virtual int getVolume ()
 Provides the output volume in % (0...100) that was set with setVolume()
 
i2c_bus_handle_t getWire ()
 Provides the actual I2C communication object.
 
virtual bool isInputVolumeSupported ()
 Returns true if the driver supports setting the input volume, false otherwise. By default we return false, but some drivers (e.g. WM8962) override this to return true.
 
bool readPagedReg (RegAddr reg, uint8_t &value)
 Reads a register on the given page.
 
virtual bool setActive (codec_mode_t mode)
 
void setAddress (uint8_t addr)
 Defines the I2C address of the codec.
 
bool setDACMute (bool mute)
 
bool setDevices (input_device_t input_device, output_device_t output_device) override
 Stores the output device selection for use by configureOutput()
 
virtual bool setInputVolume (int volume)
 
bool setMute (bool mute) override
 Mutes/unmutes all outputs.
 
bool setOutputMute (bool mute, AIC3104Channel channel=AIC3104Channel::All)
 Mute / unmute the headphone and/or line output driver(s)
 
bool setOutputVolume (int vol, AIC3104Channel channel=AIC3104Channel::All)
 Set the output (headphone / line out) volume.
 
bool setVolume (int volume) override
 
void setWire (i2c_bus_handle_t w)
 Defines the I2C communication object.
 
bool softReset ()
 Soft reset of the codec.
 
bool startOutput ()
 Power up the DAC channels.
 
bool stopOutput ()
 Power down the DAC channels.
 
bool updatePagedReg (RegAddr reg, uint8_t mask, uint8_t value)
 Read-Modify-Write of a register on the given page.
 
bool writePagedReg (RegAddr reg, uint8_t value)
 Writes a register on the given page.
 

Static Public Member Functions

static uint8_t PLL_P_CODE (uint8_t p)
 PLL P register code: P=8 -> 000, P=1..7 -> value itself.
 
static uint8_t PLL_Q_CODE (uint8_t q)
 PLL Q register code: Q=16 -> 0000, Q=17 -> 0001, Q=2..15 -> value itself.
 
static uint8_t PLL_R_CODE (uint8_t r)
 PLL R value lives in OVRF_STATUS_AND_PLLR_ADDR, D3-D0 (code = R - 1)
 
static uint8_t ROUTE_VOL (uint8_t atten)
 

Static Public Attributes

static constexpr RegAddr ADC_DIG_FILT_CTRL_ADDR {0, 107}
 
static constexpr RegAddr ADC_FLAG_ADDR {0, 36}
 
static constexpr uint8_t ADC_PWR_ON = makeBit(2, 1)
 
static constexpr uint8_t AIC3104_IFTYPE_DSP = makeBits(7, 6, 0b01)
 
static constexpr uint8_t AIC3104_IFTYPE_I2S = makeBits(7, 6, 0b00)
 
static constexpr uint8_t AIC3104_IFTYPE_LJF = makeBits(7, 6, 0b11)
 
static constexpr uint8_t AIC3104_IFTYPE_RJF = makeBits(7, 6, 0b10)
 
static constexpr RegAddr ANALOG_BYPASS_CTRL_ADDR {0, 108}
 
static constexpr RegAddr ASD_INTF_CTRLA_ADDR {0, 8}
 
static constexpr RegAddr ASD_INTF_CTRLB_ADDR {0, 9}
 
static constexpr RegAddr ASD_INTF_CTRLC_ADDR {0, 10}
 
static constexpr uint8_t ASD_WLEN_16 = makeBits(5, 4, 0b00)
 
static constexpr uint8_t ASD_WLEN_20 = makeBits(5, 4, 0b01)
 
static constexpr uint8_t ASD_WLEN_24 = makeBits(5, 4, 0b10)
 
static constexpr uint8_t ASD_WLEN_32 = makeBits(5, 4, 0b11)
 
static constexpr RegAddr CLK_ADDR {0, 101}
 
static constexpr RegAddr CLK_GEN_ADDR {0, 102}
 
static constexpr RegAddr CODEC_DATAPATH_ADDR {0, 7}
 
static constexpr int CODEC_OUTPUT_VOLUME_MAX = 0
 Output volume range, in 0.5dB steps (-63.5dB .. 0dB)
 
static constexpr int CODEC_OUTPUT_VOLUME_MIN = -127
 
static constexpr RegAddr D3D_ATTEN_LSB {1, 54}
 
static constexpr RegAddr D3D_ATTEN_MSB {1, 53}
 
static constexpr RegAddr DAC_PWR_ADDR {0, 37}
 
static constexpr RegAddr DAC_QUIESCENT_CURRENT_ADDR {0, 109}
 
static constexpr RegAddr DAC_SW_CTRL_ADDR {0, 41}
 
static constexpr uint8_t DAC_UNMUTE = makeBit(7, 1)
 
static constexpr RegAddr DACL1_HPLCOM_VOL_ADDR {0, 54}
 
static constexpr RegAddr DACL1_HPLOUT_VOL_ADDR {0, 47}
 
static constexpr RegAddr DACL1_HPRCOM_VOL_ADDR {0, 68}
 
static constexpr RegAddr DACL1_HPROUT_VOL_ADDR {0, 61}
 
static constexpr RegAddr DACL1_LLOPM_VOL_ADDR {0, 82}
 
static constexpr RegAddr DACL1_RLOPM_VOL_ADDR {0, 89}
 
static constexpr RegAddr DACR1_HPLCOM_VOL_ADDR {0, 57}
 
static constexpr RegAddr DACR1_HPLOUT_VOL_ADDR {0, 50}
 
static constexpr RegAddr DACR1_HPRCOM_VOL_ADDR {0, 71}
 
static constexpr RegAddr DACR1_HPROUT_VOL_ADDR {0, 64}
 
static constexpr RegAddr DACR1_LLOPM_VOL_ADDR {0, 85}
 
static constexpr RegAddr DACR1_RLOPM_VOL_ADDR {0, 92}
 
static constexpr RegAddr DIGI_FILT_CTRL_ADDR {0, 12}
 
static constexpr uint8_t DUAL_RATE_MODE = (makeBit(6, 1)) | (makeBit(5, 1))
 
static constexpr uint8_t FSREF_44100 = makeBit(7, 1)
 
static constexpr uint8_t FSREF_48000 = 0
 
static constexpr RegAddr HEADSET_BTN_PRESS_DETECTA_ADDR {0, 13}
 
static constexpr RegAddr HEADSET_BTN_PRESS_DETECTB_ADDR {0, 14}
 
static constexpr uint8_t HP_UNMUTE = makeBit(3, 1)
 
static constexpr RegAddr HPCOM_CMVOLT_ADDR {0, 40}
 
static constexpr RegAddr HPLCOM_CTRL_ADDR {0, 58}
 
static constexpr RegAddr HPLOUT_CTRL_ADDR {0, 51}
 
static constexpr RegAddr HPRCOM_CFG_ADDR {0, 38}
 
static constexpr RegAddr HPRCOM_CTRL_ADDR {0, 72}
 
static constexpr RegAddr HPROUT_CTRL_ADDR {0, 65}
 
static constexpr uint8_t I2C_ADDR = 0x18
 
static constexpr RegAddr I2C_BUS_STATUS_ADDR {0, 107}
 
static constexpr RegAddr LADC_VOL_ADDR {0, 15}
 
static constexpr RegAddr LAGC_CTRLA_ADDR {0, 26}
 
static constexpr RegAddr LAGC_CTRLB_ADDR {0, 27}
 
static constexpr RegAddr LAGC_CTRLC_ADDR {0, 28}
 
static constexpr RegAddr LAGC_GAIN_ADDR {0, 32}
 
static constexpr RegAddr LAGC_NGATE_DEBOUNCE_ADDR {0, 34}
 
static constexpr RegAddr LAGC_PROG_ATTACK_ADDR {0, 103}
 
static constexpr RegAddr LAGC_PROG_DECAY_ADDR {0, 104}
 
static constexpr RegAddr LCH_ADC_HPF_D1_LSB_ADDR {1, 70}
 
static constexpr RegAddr LCH_ADC_HPF_D1_MSB_ADDR {1, 69}
 
static constexpr RegAddr LCH_ADC_HPF_N0_LSB_ADDR {1, 66}
 
static constexpr RegAddr LCH_ADC_HPF_N0_MSB_ADDR {1, 65}
 
static constexpr RegAddr LCH_ADC_HPF_N1_LSB_ADDR {1, 68}
 
static constexpr RegAddr LCH_ADC_HPF_N1_MSB_ADDR {1, 67}
 
static constexpr RegAddr LCH_DEEMP_D0_LSB_ADDR {1, 26}
 
static constexpr RegAddr LCH_DEEMP_D0_MSB_ADDR {1, 25}
 
static constexpr RegAddr LCH_DEEMP_N0_LSB_ADDR {1, 22}
 
static constexpr RegAddr LCH_DEEMP_N0_MSB_ADDR {1, 21}
 
static constexpr RegAddr LCH_DEEMP_N1_LSB_ADDR {1, 24}
 
static constexpr RegAddr LCH_DEEMP_N1_MSB_ADDR {1, 23}
 
static constexpr RegAddr LCH_FX_D1_LSB_ADDR {1, 14}
 
static constexpr RegAddr LCH_FX_D1_MSB_ADDR {1, 13}
 
static constexpr RegAddr LCH_FX_D2_LSB_ADDR {1, 16}
 
static constexpr RegAddr LCH_FX_D2_MSB_ADDR {1, 15}
 
static constexpr RegAddr LCH_FX_D4_LSB_ADDR {1, 18}
 
static constexpr RegAddr LCH_FX_D4_MSB_ADDR {1, 17}
 
static constexpr RegAddr LCH_FX_D5_LSB_ADDR {1, 20}
 
static constexpr RegAddr LCH_FX_D5_MSB_ADDR {1, 19}
 
static constexpr RegAddr LCH_FX_N0_LSB_ADDR {1, 2}
 
static constexpr RegAddr LCH_FX_N0_MSB_ADDR {1, 1}
 
static constexpr RegAddr LCH_FX_N1_LSB_ADDR {1, 4}
 
static constexpr RegAddr LCH_FX_N1_MSB_ADDR {1, 3}
 
static constexpr RegAddr LCH_FX_N2_LSB_ADDR {1, 6}
 
static constexpr RegAddr LCH_FX_N2_MSB_ADDR {1, 5}
 
static constexpr RegAddr LCH_FX_N3_LSB_ADDR {1, 8}
 
static constexpr RegAddr LCH_FX_N3_MSB_ADDR {1, 7}
 
static constexpr RegAddr LCH_FX_N4_LSB_ADDR {1, 10}
 
static constexpr RegAddr LCH_FX_N4_MSB_ADDR {1, 9}
 
static constexpr RegAddr LCH_FX_N5_LSB_ADDR {1, 12}
 
static constexpr RegAddr LCH_FX_N5_MSB_ADDR {1, 11}
 
static constexpr uint8_t LDAC2LCH = makeBit(3, 1)
 
static constexpr uint8_t LDAC_PWR_ON = makeBit(7, 1)
 
static constexpr RegAddr LDAC_VOL_ADDR {0, 43}
 
static constexpr RegAddr LINE1L_LADC_CTRL_ADDR {0, 19}
 
static constexpr RegAddr LINE1L_RADC_CTRL_ADDR {0, 24}
 
static constexpr RegAddr LINE1R_LADC_CTRL_ADDR {0, 21}
 
static constexpr RegAddr LINE1R_RADC_CTRL_ADDR {0, 22}
 
static constexpr RegAddr LLOPM_CTRL_ADDR {0, 86}
 
static constexpr RegAddr MIC2_LADC_CTRL_ADDR {0, 17}
 
static constexpr RegAddr MIC2_RADC_CTRL_ADDR {0, 18}
 
static constexpr RegAddr MICBIAS_CTRL_ADDR {0, 25}
 
static constexpr uint8_t NCODEC_1 = 0x0
 
static constexpr uint8_t NCODEC_1_5 = 0x1
 
static constexpr uint8_t NCODEC_2 = 0x2
 
static constexpr uint8_t NCODEC_2_5 = 0x3
 
static constexpr uint8_t NCODEC_3 = 0x4
 
static constexpr uint8_t NCODEC_3_5 = 0x5
 
static constexpr uint8_t NCODEC_4 = 0x6
 
static constexpr uint8_t NCODEC_4_5 = 0x7
 
static constexpr uint8_t NCODEC_5 = 0x8
 
static constexpr uint8_t NCODEC_5_5 = 0x9
 
static constexpr uint8_t NCODEC_6 = 0xA
 
static constexpr uint8_t OUT_PWR_ON = makeBit(0, 1)
 
static constexpr RegAddr OVRF_STATUS_PLLR_ADDR {0, 11}
 
static constexpr RegAddr PGAL_HPLCOM_VOL_ADDR {0, 53}
 
static constexpr RegAddr PGAL_HPLOUT_VOL_ADDR {0, 46}
 
static constexpr RegAddr PGAL_HPRCOM_VOL_ADDR {0, 67}
 
static constexpr RegAddr PGAL_HPROUT_VOL_ADDR {0, 60}
 
static constexpr RegAddr PGAL_LLOPM_VOL_ADDR {0, 81}
 
static constexpr RegAddr PGAL_RLOPM_VOL_ADDR {0, 88}
 
static constexpr RegAddr PGAR_HPLCOM_VOL_ADDR {0, 56}
 
static constexpr RegAddr PGAR_HPLOUT_VOL_ADDR {0, 49}
 
static constexpr RegAddr PGAR_HPRCOM_VOL_ADDR {0, 70}
 
static constexpr RegAddr PGAR_HPROUT_VOL_ADDR {0, 63}
 
static constexpr RegAddr PGAR_LLOPM_VOL_ADDR {0, 84}
 
static constexpr RegAddr PGAR_RLOPM_VOL_ADDR {0, 91}
 
static constexpr RegAddr PLL_PROGA_ADDR {0, 3}
 
static constexpr RegAddr PLL_PROGB_ADDR {0, 4}
 
static constexpr RegAddr PLL_PROGC_ADDR {0, 5}
 
static constexpr RegAddr PLL_PROGD_ADDR {0, 6}
 
static constexpr RegAddr POP_REDUCTION_ADDR {0, 42}
 
static constexpr RegAddr POWER_STATUS_ADDR {0, 94}
 
static constexpr RegAddr RADC_VOL_ADDR {0, 16}
 
static constexpr RegAddr RAGC_CTRLA_ADDR {0, 29}
 
static constexpr RegAddr RAGC_CTRLB_ADDR {0, 30}
 
static constexpr RegAddr RAGC_CTRLC_ADDR {0, 31}
 
static constexpr RegAddr RAGC_GAIN_ADDR {0, 33}
 
static constexpr RegAddr RAGC_NGATE_DEBOUNCE_ADDR {0, 35}
 
static constexpr RegAddr RAGC_PROG_ATTACK_ADDR {0, 105}
 
static constexpr RegAddr RAGC_PROG_DECAY_ADDR {0, 106}
 
static constexpr RegAddr RCH_ADC_HPF_D1_LSB_ADDR {1, 76}
 
static constexpr RegAddr RCH_ADC_HPF_D1_MSB_ADDR {1, 75}
 
static constexpr RegAddr RCH_ADC_HPF_N0_LSB_ADDR {1, 72}
 
static constexpr RegAddr RCH_ADC_HPF_N0_MSB_ADDR {1, 71}
 
static constexpr RegAddr RCH_ADC_HPF_N1_LSB_ADDR {1, 74}
 
static constexpr RegAddr RCH_ADC_HPF_N1_MSB_ADDR {1, 73}
 
static constexpr RegAddr RCH_DEEMP_D0_LSB_ADDR {1, 52}
 
static constexpr RegAddr RCH_DEEMP_D0_MSB_ADDR {1, 51}
 
static constexpr RegAddr RCH_DEEMP_N0_LSB_ADDR {1, 48}
 
static constexpr RegAddr RCH_DEEMP_N0_MSB_ADDR {1, 47}
 
static constexpr RegAddr RCH_DEEMP_N1_LSB_ADDR {1, 50}
 
static constexpr RegAddr RCH_DEEMP_N1_MSB_ADDR {1, 49}
 
static constexpr RegAddr RCH_FX_D1_LSB_ADDR {1, 40}
 
static constexpr RegAddr RCH_FX_D1_MSB_ADDR {1, 39}
 
static constexpr RegAddr RCH_FX_D2_LSB_ADDR {1, 42}
 
static constexpr RegAddr RCH_FX_D2_MSB_ADDR {1, 41}
 
static constexpr RegAddr RCH_FX_D4_LSB_ADDR {1, 44}
 
static constexpr RegAddr RCH_FX_D4_MSB_ADDR {1, 43}
 
static constexpr RegAddr RCH_FX_D5_LSB_ADDR {1, 46}
 
static constexpr RegAddr RCH_FX_D5_MSB_ADDR {1, 45}
 
static constexpr RegAddr RCH_FX_N0_LSB_ADDR {1, 28}
 
static constexpr RegAddr RCH_FX_N0_MSB_ADDR {1, 27}
 
static constexpr RegAddr RCH_FX_N1_LSB_ADDR {1, 30}
 
static constexpr RegAddr RCH_FX_N1_MSB_ADDR {1, 29}
 
static constexpr RegAddr RCH_FX_N2_LSB_ADDR {1, 32}
 
static constexpr RegAddr RCH_FX_N2_MSB_ADDR {1, 31}
 
static constexpr RegAddr RCH_FX_N3_LSB_ADDR {1, 34}
 
static constexpr RegAddr RCH_FX_N3_MSB_ADDR {1, 33}
 
static constexpr RegAddr RCH_FX_N4_LSB_ADDR {1, 36}
 
static constexpr RegAddr RCH_FX_N4_MSB_ADDR {1, 35}
 
static constexpr RegAddr RCH_FX_N5_LSB_ADDR {1, 38}
 
static constexpr RegAddr RCH_FX_N5_MSB_ADDR {1, 37}
 
static constexpr uint8_t RDAC2RCH = makeBit(1, 1)
 
static constexpr uint8_t RDAC_PWR_ON = makeBit(6, 1)
 
static constexpr RegAddr RDAC_VOL_ADDR {0, 44}
 
static constexpr RegAddr RLOPM_CTRL_ADDR {0, 93}
 
static constexpr uint8_t ROUTE_ON = makeBit(7, 1)
 
static constexpr RegAddr RT_IRQ_FLAGS_ADDR {0, 97}
 
static constexpr RegAddr SAMPLE_RATE_SEL_ADDR {0, 2}
 
static constexpr RegAddr SHORT_DETECT_ADDR {0, 95}
 
static constexpr RegAddr SOFT_RESET_ADDR {0, 1}
 
static constexpr RegAddr STICKY_IRQ_FLAGS_ADDR {0, 96}
 

Protected Member Functions

bool readReg (uint8_t reg, uint8_t &value, bool stopBit=true)
 Reads a single byte from an 8 bit register address.
 
bool readReg16 (uint8_t reg, uint16_t &value)
 Reads a 16 bit (big endian) value from an 8 bit register address.
 
bool selectPage (uint8_t page)
 Selects the active register page (writes register 0 of page 0)
 
bool updateReg (uint8_t reg, uint8_t mask, uint8_t value)
 Read-Modify-Write of a single byte register.
 
bool updateReg16 (uint8_t reg, uint16_t mask, uint16_t value)
 Read-Modify-Write of a 16 bit (big endian) register.
 
bool writeReg (uint8_t reg, uint8_t value)
 Writes a single byte to an 8 bit register address.
 
bool writeReg16 (uint8_t reg, uint16_t value)
 Writes a 16 bit (big endian) value to an 8 bit register address.
 

Static Protected Member Functions

static const PllDivs * pllDivTable (size_t &count)
 
static const RateDivs * rateDivTable (size_t &count)
 

Protected Attributes

uint8_t current_page = 0xFF
 cached page, invalid initially
 
uint8_t i2c_addr = 0
 
input_device_t input_device = ADC_INPUT_ALL
 
int input_volume_percent = 100
 Last input volume (in %) provided to setInputVolume()
 
output_device_t output_device = DAC_OUTPUT_ALL
 Output and input device selections set via setDevices(),.
 
int volume_percent = 100
 Last volume (in %) provided to setVolume()
 
i2c_bus_handle_t wire = nullptr
 

Static Protected Attributes

static constexpr uint8_t PAGE_CONTROL_ADDR = 0
 

Detailed Description

Header only C++ driver for the TLV320AIC3104 audio codec.

The TLV320AIC3104 uses a paged 8 bit register map (page select register at page 0 / register 0, pages 0 and 1 are used by this device). Provides soft reset, PLL/clock configuration (P/Q/J/D PLL plus a shared ADC/DAC "NCODEC" divider), DAI (I2S) format configuration and output/input path configuration including volume and mute control for the headphone (HPLOUT/HPROUT) and fully differential line (LOP/M) outputs, and the microphone/line input PGAs.

Constructor & Destructor Documentation

◆ TLV320AIC3104()

TLV320AIC3104 ( )
inline

Member Function Documentation

◆ address()

uint8_t address ( )
inlineinherited

Provides the actual I2C address of the codec.

◆ begin() [1/2]

bool begin ( uint32_t  sample_rate,
uint8_t  bits,
codec_mode_t  mode,
i2s_format_t  fmt,
bool  is_master,
uint8_t  channels 
)
inlineoverridevirtual

Initializes the codec for I2S with the given sample rate and bits per sample.

Implements ZephyrDriverCommon.

◆ begin() [2/2]

bool begin ( uint32_t  sample_rate = 44100,
uint8_t  word_size = 16,
uint8_t  channels = 2,
bool  is_master = false,
uint32_t  mclk = 0 
)
inline

◆ configureClocks()

bool configureClocks ( uint32_t  sample_rate,
uint8_t  word_size,
uint8_t  channels,
uint32_t  mclk,
bool  is_master 
)
inline

Configure the PLL for the given MCLK/fS(ref) combination, then set the shared ADC/DAC NCODEC divider (and dual-rate mode) needed to reach the requested sample rate from that fS(ref).

◆ configureDai()

bool configureDai ( uint8_t  word_size)
inline

Configure the digital audio interface (I2S) word size and clock direction.

◆ configureInput()

bool configureInput ( )
inline

Configure the microphone/line input path to the Left/Right ADC PGA at 0dB and power up the ADC channels, set the microphone bias, and set the ADC PGA to its default gain, unmuted. ADC_INPUT_DIFFERENCE: Balanced inputs on Line1/Mic1, with Mic gain. ADC_INPUT_LINE1: Single ended inputs on Line1/Mic1, Line leve. ADC_INPUT_LINE2: Single ended inputs on Line2/Mic2, Line level ADC_INPUT_LINE3: Single ended inputs on Line2/Mic2, Mic gain. ADC_INPUT_ALL: Singled ended line inputs on Line1, Single ended mono Mic input on Mic2, Line2 off. No cross-mixing (eg: left to right)

◆ configureOutput()

bool configureOutput ( )
inline

Configure the headphone (HPLOUT/HPROUT) and/or fully differential line (LOP/M) output paths, depending on the output device selected via setDevices(): power up the DAC, route the DAC output to the selected mixer(s) at default (0dB) volume, unmute and power up the corresponding output drivers.

◆ getInputVolume()

virtual int getInputVolume ( )
inlinevirtualinherited

Provides the input volume in % (0...100) that was set with setInputVolume()

◆ getVolume()

virtual int getVolume ( )
inlinevirtualinherited

Provides the output volume in % (0...100) that was set with setVolume()

◆ getWire()

i2c_bus_handle_t getWire ( )
inlineinherited

Provides the actual I2C communication object.

◆ isInputVolumeSupported()

virtual bool isInputVolumeSupported ( )
inlinevirtualinherited

Returns true if the driver supports setting the input volume, false otherwise. By default we return false, but some drivers (e.g. WM8962) override this to return true.

Reimplemented in DA7212, WM8904, and WM8962.

◆ PLL_P_CODE()

static uint8_t PLL_P_CODE ( uint8_t  p)
inlinestatic

PLL P register code: P=8 -> 000, P=1..7 -> value itself.

◆ PLL_Q_CODE()

static uint8_t PLL_Q_CODE ( uint8_t  q)
inlinestatic

PLL Q register code: Q=16 -> 0000, Q=17 -> 0001, Q=2..15 -> value itself.

◆ PLL_R_CODE()

static uint8_t PLL_R_CODE ( uint8_t  r)
inlinestatic

PLL R value lives in OVRF_STATUS_AND_PLLR_ADDR, D3-D0 (code = R - 1)

◆ pllDivTable()

static const PllDivs * pllDivTable ( size_t &  count)
inlinestaticprotected

PLL divider table indexed by (mclk, fsref), values taken from datasheet Table 10-1 "Typical MCLK Rates" (R = 1 in all cases)

◆ rateDivTable()

static const RateDivs * rateDivTable ( size_t &  count)
inlinestaticprotected

Maps a sample rate to its fS(ref) family and NCODEC divider, per datasheet section 10.3.3 ("Audio Data Converters")

◆ readPagedReg()

bool readPagedReg ( RegAddr  reg,
uint8_t &  value 
)
inline

Reads a register on the given page.

◆ readReg()

bool readReg ( uint8_t  reg,
uint8_t &  value,
bool  stopBit = true 
)
inlineprotectedinherited

Reads a single byte from an 8 bit register address.

◆ readReg16()

bool readReg16 ( uint8_t  reg,
uint16_t &  value 
)
inlineprotectedinherited

Reads a 16 bit (big endian) value from an 8 bit register address.

◆ ROUTE_VOL()

static uint8_t ROUTE_VOL ( uint8_t  atten)
inlinestatic

Route-volume field: bit7 = ROUTE_ON, bits6-0 = attenuation code (0 = 0 dB .. 127 = -63.5 dB in 0.5 dB steps)

◆ selectPage()

bool selectPage ( uint8_t  page)
inlineprotected

Selects the active register page (writes register 0 of page 0)

◆ setActive()

virtual bool setActive ( codec_mode_t  mode)
inlinevirtualinherited

Activates/deactivates the playback and/or capture path at runtime (without reconfiguring the codec), based on codec_mode_t (CODEC_MODE_DECODE: playback active, CODEC_MODE_ENCODE: capture active). By default this just mutes/unmutes all outputs depending on CODEC_MODE_DECODE; chip specific subclasses that support muting the input path independently override this to also mute/unmute the capture path depending on CODEC_MODE_ENCODE.

Reimplemented in DA7212, WM8904, and WM8962.

◆ setAddress()

void setAddress ( uint8_t  addr)
inlineinherited

Defines the I2C address of the codec.

◆ setDACMute()

bool setDACMute ( bool  mute)
inline

◆ setDevices()

bool setDevices ( input_device_t  input_device,
output_device_t  output_device 
)
inlineoverridevirtual

Stores the output device selection for use by configureOutput()

Reimplemented from ZephyrDriverCommon.

◆ setInputVolume()

virtual bool setInputVolume ( int  volume)
inlinevirtualinherited

Defines the input volume in % (0...100). Chip specific subclasses map this to their native input volume range.

Reimplemented in DA7212, WM8904, and WM8962.

◆ setMute()

bool setMute ( bool  mute)
inlineoverridevirtual

Mutes/unmutes all outputs.

Reimplemented from ZephyrDriverCommon.

◆ setOutputMute()

bool setOutputMute ( bool  mute,
AIC3104Channel  channel = AIC3104Channel::All 
)
inline

Mute / unmute the headphone and/or line output driver(s)

◆ setOutputVolume()

bool setOutputVolume ( int  vol,
AIC3104Channel  channel = AIC3104Channel::All 
)
inline

Set the output (headphone / line out) volume.

Parameters
volvolume in 0.5dB steps, range CODEC_OUTPUT_VOLUME_MIN (-127, i.e. -63.5dB) .. CODEC_OUTPUT_VOLUME_MAX (0, i.e. 0dB)
channeltarget channel(s)

< 0 (0dB) .. 127 (-63.5dB)

◆ setVolume()

bool setVolume ( int  volume)
inlineoverridevirtual

Sets the output volume in % (0...100) for all channels, mapped to [CODEC_OUTPUT_VOLUME_MIN..CODEC_OUTPUT_VOLUME_MAX] (0.5dB steps)

Reimplemented from ZephyrDriverCommon.

◆ setWire()

void setWire ( i2c_bus_handle_t  w)
inlineinherited

Defines the I2C communication object.

◆ softReset()

bool softReset ( )
inline

Soft reset of the codec.

◆ startOutput()

bool startOutput ( )
inline

Power up the DAC channels.

◆ stopOutput()

bool stopOutput ( )
inline

Power down the DAC channels.

◆ updatePagedReg()

bool updatePagedReg ( RegAddr  reg,
uint8_t  mask,
uint8_t  value 
)
inline

Read-Modify-Write of a register on the given page.

◆ updateReg()

bool updateReg ( uint8_t  reg,
uint8_t  mask,
uint8_t  value 
)
inlineprotectedinherited

Read-Modify-Write of a single byte register.

◆ updateReg16()

bool updateReg16 ( uint8_t  reg,
uint16_t  mask,
uint16_t  value 
)
inlineprotectedinherited

Read-Modify-Write of a 16 bit (big endian) register.

◆ writePagedReg()

bool writePagedReg ( RegAddr  reg,
uint8_t  value 
)
inline

Writes a register on the given page.

◆ writeReg()

bool writeReg ( uint8_t  reg,
uint8_t  value 
)
inlineprotectedinherited

Writes a single byte to an 8 bit register address.

◆ writeReg16()

bool writeReg16 ( uint8_t  reg,
uint16_t  value 
)
inlineprotectedinherited

Writes a 16 bit (big endian) value to an 8 bit register address.

Member Data Documentation

◆ ADC_DIG_FILT_CTRL_ADDR

constexpr RegAddr ADC_DIG_FILT_CTRL_ADDR {0, 107}
staticconstexpr

◆ ADC_FLAG_ADDR

constexpr RegAddr ADC_FLAG_ADDR {0, 36}
staticconstexpr

◆ ADC_PWR_ON

constexpr uint8_t ADC_PWR_ON = makeBit(2, 1)
staticconstexpr

◆ AIC3104_IFTYPE_DSP

constexpr uint8_t AIC3104_IFTYPE_DSP = makeBits(7, 6, 0b01)
staticconstexpr

◆ AIC3104_IFTYPE_I2S

constexpr uint8_t AIC3104_IFTYPE_I2S = makeBits(7, 6, 0b00)
staticconstexpr

◆ AIC3104_IFTYPE_LJF

constexpr uint8_t AIC3104_IFTYPE_LJF = makeBits(7, 6, 0b11)
staticconstexpr

◆ AIC3104_IFTYPE_RJF

constexpr uint8_t AIC3104_IFTYPE_RJF = makeBits(7, 6, 0b10)
staticconstexpr

◆ ANALOG_BYPASS_CTRL_ADDR

constexpr RegAddr ANALOG_BYPASS_CTRL_ADDR {0, 108}
staticconstexpr

◆ ASD_INTF_CTRLA_ADDR

constexpr RegAddr ASD_INTF_CTRLA_ADDR {0, 8}
staticconstexpr

◆ ASD_INTF_CTRLB_ADDR

constexpr RegAddr ASD_INTF_CTRLB_ADDR {0, 9}
staticconstexpr

◆ ASD_INTF_CTRLC_ADDR

constexpr RegAddr ASD_INTF_CTRLC_ADDR {0, 10}
staticconstexpr

◆ ASD_WLEN_16

constexpr uint8_t ASD_WLEN_16 = makeBits(5, 4, 0b00)
staticconstexpr

◆ ASD_WLEN_20

constexpr uint8_t ASD_WLEN_20 = makeBits(5, 4, 0b01)
staticconstexpr

◆ ASD_WLEN_24

constexpr uint8_t ASD_WLEN_24 = makeBits(5, 4, 0b10)
staticconstexpr

◆ ASD_WLEN_32

constexpr uint8_t ASD_WLEN_32 = makeBits(5, 4, 0b11)
staticconstexpr

◆ CLK_ADDR

constexpr RegAddr CLK_ADDR {0, 101}
staticconstexpr

◆ CLK_GEN_ADDR

constexpr RegAddr CLK_GEN_ADDR {0, 102}
staticconstexpr

◆ CODEC_DATAPATH_ADDR

constexpr RegAddr CODEC_DATAPATH_ADDR {0, 7}
staticconstexpr

◆ CODEC_OUTPUT_VOLUME_MAX

constexpr int CODEC_OUTPUT_VOLUME_MAX = 0
staticconstexpr

Output volume range, in 0.5dB steps (-63.5dB .. 0dB)

◆ CODEC_OUTPUT_VOLUME_MIN

constexpr int CODEC_OUTPUT_VOLUME_MIN = -127
staticconstexpr

◆ current_page

uint8_t current_page = 0xFF
protected

cached page, invalid initially

◆ D3D_ATTEN_LSB

constexpr RegAddr D3D_ATTEN_LSB {1, 54}
staticconstexpr

◆ D3D_ATTEN_MSB

constexpr RegAddr D3D_ATTEN_MSB {1, 53}
staticconstexpr

◆ DAC_PWR_ADDR

constexpr RegAddr DAC_PWR_ADDR {0, 37}
staticconstexpr

◆ DAC_QUIESCENT_CURRENT_ADDR

constexpr RegAddr DAC_QUIESCENT_CURRENT_ADDR {0, 109}
staticconstexpr

◆ DAC_SW_CTRL_ADDR

constexpr RegAddr DAC_SW_CTRL_ADDR {0, 41}
staticconstexpr

◆ DAC_UNMUTE

constexpr uint8_t DAC_UNMUTE = makeBit(7, 1)
staticconstexpr

◆ DACL1_HPLCOM_VOL_ADDR

constexpr RegAddr DACL1_HPLCOM_VOL_ADDR {0, 54}
staticconstexpr

◆ DACL1_HPLOUT_VOL_ADDR

constexpr RegAddr DACL1_HPLOUT_VOL_ADDR {0, 47}
staticconstexpr

◆ DACL1_HPRCOM_VOL_ADDR

constexpr RegAddr DACL1_HPRCOM_VOL_ADDR {0, 68}
staticconstexpr

◆ DACL1_HPROUT_VOL_ADDR

constexpr RegAddr DACL1_HPROUT_VOL_ADDR {0, 61}
staticconstexpr

◆ DACL1_LLOPM_VOL_ADDR

constexpr RegAddr DACL1_LLOPM_VOL_ADDR {0, 82}
staticconstexpr

◆ DACL1_RLOPM_VOL_ADDR

constexpr RegAddr DACL1_RLOPM_VOL_ADDR {0, 89}
staticconstexpr

◆ DACR1_HPLCOM_VOL_ADDR

constexpr RegAddr DACR1_HPLCOM_VOL_ADDR {0, 57}
staticconstexpr

◆ DACR1_HPLOUT_VOL_ADDR

constexpr RegAddr DACR1_HPLOUT_VOL_ADDR {0, 50}
staticconstexpr

◆ DACR1_HPRCOM_VOL_ADDR

constexpr RegAddr DACR1_HPRCOM_VOL_ADDR {0, 71}
staticconstexpr

◆ DACR1_HPROUT_VOL_ADDR

constexpr RegAddr DACR1_HPROUT_VOL_ADDR {0, 64}
staticconstexpr

◆ DACR1_LLOPM_VOL_ADDR

constexpr RegAddr DACR1_LLOPM_VOL_ADDR {0, 85}
staticconstexpr

◆ DACR1_RLOPM_VOL_ADDR

constexpr RegAddr DACR1_RLOPM_VOL_ADDR {0, 92}
staticconstexpr

◆ DIGI_FILT_CTRL_ADDR

constexpr RegAddr DIGI_FILT_CTRL_ADDR {0, 12}
staticconstexpr

◆ DUAL_RATE_MODE

constexpr uint8_t DUAL_RATE_MODE = (makeBit(6, 1)) | (makeBit(5, 1))
staticconstexpr

◆ FSREF_44100

constexpr uint8_t FSREF_44100 = makeBit(7, 1)
staticconstexpr

◆ FSREF_48000

constexpr uint8_t FSREF_48000 = 0
staticconstexpr

◆ HEADSET_BTN_PRESS_DETECTA_ADDR

constexpr RegAddr HEADSET_BTN_PRESS_DETECTA_ADDR {0, 13}
staticconstexpr

◆ HEADSET_BTN_PRESS_DETECTB_ADDR

constexpr RegAddr HEADSET_BTN_PRESS_DETECTB_ADDR {0, 14}
staticconstexpr

◆ HP_UNMUTE

constexpr uint8_t HP_UNMUTE = makeBit(3, 1)
staticconstexpr

◆ HPCOM_CMVOLT_ADDR

constexpr RegAddr HPCOM_CMVOLT_ADDR {0, 40}
staticconstexpr

◆ HPLCOM_CTRL_ADDR

constexpr RegAddr HPLCOM_CTRL_ADDR {0, 58}
staticconstexpr

◆ HPLOUT_CTRL_ADDR

constexpr RegAddr HPLOUT_CTRL_ADDR {0, 51}
staticconstexpr

◆ HPRCOM_CFG_ADDR

constexpr RegAddr HPRCOM_CFG_ADDR {0, 38}
staticconstexpr

◆ HPRCOM_CTRL_ADDR

constexpr RegAddr HPRCOM_CTRL_ADDR {0, 72}
staticconstexpr

◆ HPROUT_CTRL_ADDR

constexpr RegAddr HPROUT_CTRL_ADDR {0, 65}
staticconstexpr

◆ I2C_ADDR

constexpr uint8_t I2C_ADDR = 0x18
staticconstexpr

◆ i2c_addr

uint8_t i2c_addr = 0
protectedinherited

◆ I2C_BUS_STATUS_ADDR

constexpr RegAddr I2C_BUS_STATUS_ADDR {0, 107}
staticconstexpr

◆ input_device

input_device_t input_device = ADC_INPUT_ALL
protected

◆ input_volume_percent

int input_volume_percent = 100
protectedinherited

Last input volume (in %) provided to setInputVolume()

◆ LADC_VOL_ADDR

constexpr RegAddr LADC_VOL_ADDR {0, 15}
staticconstexpr

◆ LAGC_CTRLA_ADDR

constexpr RegAddr LAGC_CTRLA_ADDR {0, 26}
staticconstexpr

◆ LAGC_CTRLB_ADDR

constexpr RegAddr LAGC_CTRLB_ADDR {0, 27}
staticconstexpr

◆ LAGC_CTRLC_ADDR

constexpr RegAddr LAGC_CTRLC_ADDR {0, 28}
staticconstexpr

◆ LAGC_GAIN_ADDR

constexpr RegAddr LAGC_GAIN_ADDR {0, 32}
staticconstexpr

◆ LAGC_NGATE_DEBOUNCE_ADDR

constexpr RegAddr LAGC_NGATE_DEBOUNCE_ADDR {0, 34}
staticconstexpr

◆ LAGC_PROG_ATTACK_ADDR

constexpr RegAddr LAGC_PROG_ATTACK_ADDR {0, 103}
staticconstexpr

◆ LAGC_PROG_DECAY_ADDR

constexpr RegAddr LAGC_PROG_DECAY_ADDR {0, 104}
staticconstexpr

◆ LCH_ADC_HPF_D1_LSB_ADDR

constexpr RegAddr LCH_ADC_HPF_D1_LSB_ADDR {1, 70}
staticconstexpr

◆ LCH_ADC_HPF_D1_MSB_ADDR

constexpr RegAddr LCH_ADC_HPF_D1_MSB_ADDR {1, 69}
staticconstexpr

◆ LCH_ADC_HPF_N0_LSB_ADDR

constexpr RegAddr LCH_ADC_HPF_N0_LSB_ADDR {1, 66}
staticconstexpr

◆ LCH_ADC_HPF_N0_MSB_ADDR

constexpr RegAddr LCH_ADC_HPF_N0_MSB_ADDR {1, 65}
staticconstexpr

◆ LCH_ADC_HPF_N1_LSB_ADDR

constexpr RegAddr LCH_ADC_HPF_N1_LSB_ADDR {1, 68}
staticconstexpr

◆ LCH_ADC_HPF_N1_MSB_ADDR

constexpr RegAddr LCH_ADC_HPF_N1_MSB_ADDR {1, 67}
staticconstexpr

◆ LCH_DEEMP_D0_LSB_ADDR

constexpr RegAddr LCH_DEEMP_D0_LSB_ADDR {1, 26}
staticconstexpr

◆ LCH_DEEMP_D0_MSB_ADDR

constexpr RegAddr LCH_DEEMP_D0_MSB_ADDR {1, 25}
staticconstexpr

◆ LCH_DEEMP_N0_LSB_ADDR

constexpr RegAddr LCH_DEEMP_N0_LSB_ADDR {1, 22}
staticconstexpr

◆ LCH_DEEMP_N0_MSB_ADDR

constexpr RegAddr LCH_DEEMP_N0_MSB_ADDR {1, 21}
staticconstexpr

◆ LCH_DEEMP_N1_LSB_ADDR

constexpr RegAddr LCH_DEEMP_N1_LSB_ADDR {1, 24}
staticconstexpr

◆ LCH_DEEMP_N1_MSB_ADDR

constexpr RegAddr LCH_DEEMP_N1_MSB_ADDR {1, 23}
staticconstexpr

◆ LCH_FX_D1_LSB_ADDR

constexpr RegAddr LCH_FX_D1_LSB_ADDR {1, 14}
staticconstexpr

◆ LCH_FX_D1_MSB_ADDR

constexpr RegAddr LCH_FX_D1_MSB_ADDR {1, 13}
staticconstexpr

◆ LCH_FX_D2_LSB_ADDR

constexpr RegAddr LCH_FX_D2_LSB_ADDR {1, 16}
staticconstexpr

◆ LCH_FX_D2_MSB_ADDR

constexpr RegAddr LCH_FX_D2_MSB_ADDR {1, 15}
staticconstexpr

◆ LCH_FX_D4_LSB_ADDR

constexpr RegAddr LCH_FX_D4_LSB_ADDR {1, 18}
staticconstexpr

◆ LCH_FX_D4_MSB_ADDR

constexpr RegAddr LCH_FX_D4_MSB_ADDR {1, 17}
staticconstexpr

◆ LCH_FX_D5_LSB_ADDR

constexpr RegAddr LCH_FX_D5_LSB_ADDR {1, 20}
staticconstexpr

◆ LCH_FX_D5_MSB_ADDR

constexpr RegAddr LCH_FX_D5_MSB_ADDR {1, 19}
staticconstexpr

◆ LCH_FX_N0_LSB_ADDR

constexpr RegAddr LCH_FX_N0_LSB_ADDR {1, 2}
staticconstexpr

◆ LCH_FX_N0_MSB_ADDR

constexpr RegAddr LCH_FX_N0_MSB_ADDR {1, 1}
staticconstexpr

◆ LCH_FX_N1_LSB_ADDR

constexpr RegAddr LCH_FX_N1_LSB_ADDR {1, 4}
staticconstexpr

◆ LCH_FX_N1_MSB_ADDR

constexpr RegAddr LCH_FX_N1_MSB_ADDR {1, 3}
staticconstexpr

◆ LCH_FX_N2_LSB_ADDR

constexpr RegAddr LCH_FX_N2_LSB_ADDR {1, 6}
staticconstexpr

◆ LCH_FX_N2_MSB_ADDR

constexpr RegAddr LCH_FX_N2_MSB_ADDR {1, 5}
staticconstexpr

◆ LCH_FX_N3_LSB_ADDR

constexpr RegAddr LCH_FX_N3_LSB_ADDR {1, 8}
staticconstexpr

◆ LCH_FX_N3_MSB_ADDR

constexpr RegAddr LCH_FX_N3_MSB_ADDR {1, 7}
staticconstexpr

◆ LCH_FX_N4_LSB_ADDR

constexpr RegAddr LCH_FX_N4_LSB_ADDR {1, 10}
staticconstexpr

◆ LCH_FX_N4_MSB_ADDR

constexpr RegAddr LCH_FX_N4_MSB_ADDR {1, 9}
staticconstexpr

◆ LCH_FX_N5_LSB_ADDR

constexpr RegAddr LCH_FX_N5_LSB_ADDR {1, 12}
staticconstexpr

◆ LCH_FX_N5_MSB_ADDR

constexpr RegAddr LCH_FX_N5_MSB_ADDR {1, 11}
staticconstexpr

◆ LDAC2LCH

constexpr uint8_t LDAC2LCH = makeBit(3, 1)
staticconstexpr

◆ LDAC_PWR_ON

constexpr uint8_t LDAC_PWR_ON = makeBit(7, 1)
staticconstexpr

◆ LDAC_VOL_ADDR

constexpr RegAddr LDAC_VOL_ADDR {0, 43}
staticconstexpr

◆ LINE1L_LADC_CTRL_ADDR

constexpr RegAddr LINE1L_LADC_CTRL_ADDR {0, 19}
staticconstexpr

◆ LINE1L_RADC_CTRL_ADDR

constexpr RegAddr LINE1L_RADC_CTRL_ADDR {0, 24}
staticconstexpr

◆ LINE1R_LADC_CTRL_ADDR

constexpr RegAddr LINE1R_LADC_CTRL_ADDR {0, 21}
staticconstexpr

◆ LINE1R_RADC_CTRL_ADDR

constexpr RegAddr LINE1R_RADC_CTRL_ADDR {0, 22}
staticconstexpr

◆ LLOPM_CTRL_ADDR

constexpr RegAddr LLOPM_CTRL_ADDR {0, 86}
staticconstexpr

◆ MIC2_LADC_CTRL_ADDR

constexpr RegAddr MIC2_LADC_CTRL_ADDR {0, 17}
staticconstexpr

◆ MIC2_RADC_CTRL_ADDR

constexpr RegAddr MIC2_RADC_CTRL_ADDR {0, 18}
staticconstexpr

◆ MICBIAS_CTRL_ADDR

constexpr RegAddr MICBIAS_CTRL_ADDR {0, 25}
staticconstexpr

◆ NCODEC_1

constexpr uint8_t NCODEC_1 = 0x0
staticconstexpr

◆ NCODEC_1_5

constexpr uint8_t NCODEC_1_5 = 0x1
staticconstexpr

◆ NCODEC_2

constexpr uint8_t NCODEC_2 = 0x2
staticconstexpr

◆ NCODEC_2_5

constexpr uint8_t NCODEC_2_5 = 0x3
staticconstexpr

◆ NCODEC_3

constexpr uint8_t NCODEC_3 = 0x4
staticconstexpr

◆ NCODEC_3_5

constexpr uint8_t NCODEC_3_5 = 0x5
staticconstexpr

◆ NCODEC_4

constexpr uint8_t NCODEC_4 = 0x6
staticconstexpr

◆ NCODEC_4_5

constexpr uint8_t NCODEC_4_5 = 0x7
staticconstexpr

◆ NCODEC_5

constexpr uint8_t NCODEC_5 = 0x8
staticconstexpr

◆ NCODEC_5_5

constexpr uint8_t NCODEC_5_5 = 0x9
staticconstexpr

◆ NCODEC_6

constexpr uint8_t NCODEC_6 = 0xA
staticconstexpr

◆ OUT_PWR_ON

constexpr uint8_t OUT_PWR_ON = makeBit(0, 1)
staticconstexpr

◆ output_device

output_device_t output_device = DAC_OUTPUT_ALL
protected

Output and input device selections set via setDevices(),.

◆ OVRF_STATUS_PLLR_ADDR

constexpr RegAddr OVRF_STATUS_PLLR_ADDR {0, 11}
staticconstexpr

◆ PAGE_CONTROL_ADDR

constexpr uint8_t PAGE_CONTROL_ADDR = 0
staticconstexprprotected

◆ PGAL_HPLCOM_VOL_ADDR

constexpr RegAddr PGAL_HPLCOM_VOL_ADDR {0, 53}
staticconstexpr

◆ PGAL_HPLOUT_VOL_ADDR

constexpr RegAddr PGAL_HPLOUT_VOL_ADDR {0, 46}
staticconstexpr

◆ PGAL_HPRCOM_VOL_ADDR

constexpr RegAddr PGAL_HPRCOM_VOL_ADDR {0, 67}
staticconstexpr

◆ PGAL_HPROUT_VOL_ADDR

constexpr RegAddr PGAL_HPROUT_VOL_ADDR {0, 60}
staticconstexpr

◆ PGAL_LLOPM_VOL_ADDR

constexpr RegAddr PGAL_LLOPM_VOL_ADDR {0, 81}
staticconstexpr

◆ PGAL_RLOPM_VOL_ADDR

constexpr RegAddr PGAL_RLOPM_VOL_ADDR {0, 88}
staticconstexpr

◆ PGAR_HPLCOM_VOL_ADDR

constexpr RegAddr PGAR_HPLCOM_VOL_ADDR {0, 56}
staticconstexpr

◆ PGAR_HPLOUT_VOL_ADDR

constexpr RegAddr PGAR_HPLOUT_VOL_ADDR {0, 49}
staticconstexpr

◆ PGAR_HPRCOM_VOL_ADDR

constexpr RegAddr PGAR_HPRCOM_VOL_ADDR {0, 70}
staticconstexpr

◆ PGAR_HPROUT_VOL_ADDR

constexpr RegAddr PGAR_HPROUT_VOL_ADDR {0, 63}
staticconstexpr

◆ PGAR_LLOPM_VOL_ADDR

constexpr RegAddr PGAR_LLOPM_VOL_ADDR {0, 84}
staticconstexpr

◆ PGAR_RLOPM_VOL_ADDR

constexpr RegAddr PGAR_RLOPM_VOL_ADDR {0, 91}
staticconstexpr

◆ PLL_PROGA_ADDR

constexpr RegAddr PLL_PROGA_ADDR {0, 3}
staticconstexpr

◆ PLL_PROGB_ADDR

constexpr RegAddr PLL_PROGB_ADDR {0, 4}
staticconstexpr

◆ PLL_PROGC_ADDR

constexpr RegAddr PLL_PROGC_ADDR {0, 5}
staticconstexpr

◆ PLL_PROGD_ADDR

constexpr RegAddr PLL_PROGD_ADDR {0, 6}
staticconstexpr

◆ POP_REDUCTION_ADDR

constexpr RegAddr POP_REDUCTION_ADDR {0, 42}
staticconstexpr

◆ POWER_STATUS_ADDR

constexpr RegAddr POWER_STATUS_ADDR {0, 94}
staticconstexpr

◆ RADC_VOL_ADDR

constexpr RegAddr RADC_VOL_ADDR {0, 16}
staticconstexpr

◆ RAGC_CTRLA_ADDR

constexpr RegAddr RAGC_CTRLA_ADDR {0, 29}
staticconstexpr

◆ RAGC_CTRLB_ADDR

constexpr RegAddr RAGC_CTRLB_ADDR {0, 30}
staticconstexpr

◆ RAGC_CTRLC_ADDR

constexpr RegAddr RAGC_CTRLC_ADDR {0, 31}
staticconstexpr

◆ RAGC_GAIN_ADDR

constexpr RegAddr RAGC_GAIN_ADDR {0, 33}
staticconstexpr

◆ RAGC_NGATE_DEBOUNCE_ADDR

constexpr RegAddr RAGC_NGATE_DEBOUNCE_ADDR {0, 35}
staticconstexpr

◆ RAGC_PROG_ATTACK_ADDR

constexpr RegAddr RAGC_PROG_ATTACK_ADDR {0, 105}
staticconstexpr

◆ RAGC_PROG_DECAY_ADDR

constexpr RegAddr RAGC_PROG_DECAY_ADDR {0, 106}
staticconstexpr

◆ RCH_ADC_HPF_D1_LSB_ADDR

constexpr RegAddr RCH_ADC_HPF_D1_LSB_ADDR {1, 76}
staticconstexpr

◆ RCH_ADC_HPF_D1_MSB_ADDR

constexpr RegAddr RCH_ADC_HPF_D1_MSB_ADDR {1, 75}
staticconstexpr

◆ RCH_ADC_HPF_N0_LSB_ADDR

constexpr RegAddr RCH_ADC_HPF_N0_LSB_ADDR {1, 72}
staticconstexpr

◆ RCH_ADC_HPF_N0_MSB_ADDR

constexpr RegAddr RCH_ADC_HPF_N0_MSB_ADDR {1, 71}
staticconstexpr

◆ RCH_ADC_HPF_N1_LSB_ADDR

constexpr RegAddr RCH_ADC_HPF_N1_LSB_ADDR {1, 74}
staticconstexpr

◆ RCH_ADC_HPF_N1_MSB_ADDR

constexpr RegAddr RCH_ADC_HPF_N1_MSB_ADDR {1, 73}
staticconstexpr

◆ RCH_DEEMP_D0_LSB_ADDR

constexpr RegAddr RCH_DEEMP_D0_LSB_ADDR {1, 52}
staticconstexpr

◆ RCH_DEEMP_D0_MSB_ADDR

constexpr RegAddr RCH_DEEMP_D0_MSB_ADDR {1, 51}
staticconstexpr

◆ RCH_DEEMP_N0_LSB_ADDR

constexpr RegAddr RCH_DEEMP_N0_LSB_ADDR {1, 48}
staticconstexpr

◆ RCH_DEEMP_N0_MSB_ADDR

constexpr RegAddr RCH_DEEMP_N0_MSB_ADDR {1, 47}
staticconstexpr

◆ RCH_DEEMP_N1_LSB_ADDR

constexpr RegAddr RCH_DEEMP_N1_LSB_ADDR {1, 50}
staticconstexpr

◆ RCH_DEEMP_N1_MSB_ADDR

constexpr RegAddr RCH_DEEMP_N1_MSB_ADDR {1, 49}
staticconstexpr

◆ RCH_FX_D1_LSB_ADDR

constexpr RegAddr RCH_FX_D1_LSB_ADDR {1, 40}
staticconstexpr

◆ RCH_FX_D1_MSB_ADDR

constexpr RegAddr RCH_FX_D1_MSB_ADDR {1, 39}
staticconstexpr

◆ RCH_FX_D2_LSB_ADDR

constexpr RegAddr RCH_FX_D2_LSB_ADDR {1, 42}
staticconstexpr

◆ RCH_FX_D2_MSB_ADDR

constexpr RegAddr RCH_FX_D2_MSB_ADDR {1, 41}
staticconstexpr

◆ RCH_FX_D4_LSB_ADDR

constexpr RegAddr RCH_FX_D4_LSB_ADDR {1, 44}
staticconstexpr

◆ RCH_FX_D4_MSB_ADDR

constexpr RegAddr RCH_FX_D4_MSB_ADDR {1, 43}
staticconstexpr

◆ RCH_FX_D5_LSB_ADDR

constexpr RegAddr RCH_FX_D5_LSB_ADDR {1, 46}
staticconstexpr

◆ RCH_FX_D5_MSB_ADDR

constexpr RegAddr RCH_FX_D5_MSB_ADDR {1, 45}
staticconstexpr

◆ RCH_FX_N0_LSB_ADDR

constexpr RegAddr RCH_FX_N0_LSB_ADDR {1, 28}
staticconstexpr

◆ RCH_FX_N0_MSB_ADDR

constexpr RegAddr RCH_FX_N0_MSB_ADDR {1, 27}
staticconstexpr

◆ RCH_FX_N1_LSB_ADDR

constexpr RegAddr RCH_FX_N1_LSB_ADDR {1, 30}
staticconstexpr

◆ RCH_FX_N1_MSB_ADDR

constexpr RegAddr RCH_FX_N1_MSB_ADDR {1, 29}
staticconstexpr

◆ RCH_FX_N2_LSB_ADDR

constexpr RegAddr RCH_FX_N2_LSB_ADDR {1, 32}
staticconstexpr

◆ RCH_FX_N2_MSB_ADDR

constexpr RegAddr RCH_FX_N2_MSB_ADDR {1, 31}
staticconstexpr

◆ RCH_FX_N3_LSB_ADDR

constexpr RegAddr RCH_FX_N3_LSB_ADDR {1, 34}
staticconstexpr

◆ RCH_FX_N3_MSB_ADDR

constexpr RegAddr RCH_FX_N3_MSB_ADDR {1, 33}
staticconstexpr

◆ RCH_FX_N4_LSB_ADDR

constexpr RegAddr RCH_FX_N4_LSB_ADDR {1, 36}
staticconstexpr

◆ RCH_FX_N4_MSB_ADDR

constexpr RegAddr RCH_FX_N4_MSB_ADDR {1, 35}
staticconstexpr

◆ RCH_FX_N5_LSB_ADDR

constexpr RegAddr RCH_FX_N5_LSB_ADDR {1, 38}
staticconstexpr

◆ RCH_FX_N5_MSB_ADDR

constexpr RegAddr RCH_FX_N5_MSB_ADDR {1, 37}
staticconstexpr

◆ RDAC2RCH

constexpr uint8_t RDAC2RCH = makeBit(1, 1)
staticconstexpr

◆ RDAC_PWR_ON

constexpr uint8_t RDAC_PWR_ON = makeBit(6, 1)
staticconstexpr

◆ RDAC_VOL_ADDR

constexpr RegAddr RDAC_VOL_ADDR {0, 44}
staticconstexpr

◆ RLOPM_CTRL_ADDR

constexpr RegAddr RLOPM_CTRL_ADDR {0, 93}
staticconstexpr

◆ ROUTE_ON

constexpr uint8_t ROUTE_ON = makeBit(7, 1)
staticconstexpr

◆ RT_IRQ_FLAGS_ADDR

constexpr RegAddr RT_IRQ_FLAGS_ADDR {0, 97}
staticconstexpr

◆ SAMPLE_RATE_SEL_ADDR

constexpr RegAddr SAMPLE_RATE_SEL_ADDR {0, 2}
staticconstexpr

◆ SHORT_DETECT_ADDR

constexpr RegAddr SHORT_DETECT_ADDR {0, 95}
staticconstexpr

◆ SOFT_RESET_ADDR

constexpr RegAddr SOFT_RESET_ADDR {0, 1}
staticconstexpr

◆ STICKY_IRQ_FLAGS_ADDR

constexpr RegAddr STICKY_IRQ_FLAGS_ADDR {0, 96}
staticconstexpr

◆ volume_percent

int volume_percent = 100
protectedinherited

Last volume (in %) provided to setVolume()

◆ wire

i2c_bus_handle_t wire = nullptr
protectedinherited
The documentation for this class was generated from the following file:
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