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DSIBusSTM32 Class Reference

IDSIBus backend for STM32 parts with a DSI host + LTDC (F469/ F479, F769/F779, H747/H757, U5x9, ...), built on STM32Cube HAL's HAL_DSI_* (command channel, adapted/video-mode DSI wrapper) and HAL_LTDC_* (the pixel-timing generator/framebuffer scanner DSI sits in front of on these parts - conceptually the same role ESP32-P4's DPI peripheral plays for DSIBusESP32). More...

#include <DSIBusSTM32.h>

Inheritance diagram for DSIBusSTM32:
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Collaboration diagram for DSIBusSTM32:
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Public Member Functions

 DSIBusSTM32 (int8_t rst, size_t width, size_t height, uint8_t laneNum, uint32_t laneMbps, uint32_t dpiClockKHz, const DSI_PLLInitTypeDef &pllInit, uint16_t *framebuffer)
 
void setVideoTiming (uint16_t hsyncPulseWidth, uint16_t hsyncBackPorch, uint16_t hsyncFrontPorch, uint16_t vsyncPulseWidth, uint16_t vsyncBackPorch, uint16_t vsyncFrontPorch)
 
bool begin () override
 
void end () override
 
bool writeCommand (uint8_t cmd, const uint8_t *param, size_t len) override
 
bool finishInit () override
 
bool drawBitmap (size_t x0, size_t y0, size_t x1, size_t y1, const uint8_t *rgb565) override
 
- Public Member Functions inherited from IDSIBus
virtual ~IDSIBus ()=default
 
virtual bool begin ()=0
 
virtual void end ()=0
 
virtual bool writeCommand (uint8_t cmd, const uint8_t *param, size_t len)=0
 
virtual bool finishInit ()=0
 
virtual bool drawBitmap (size_t x0, size_t y0, size_t x1, size_t y1, const uint8_t *rgb565)=0
 

Detailed Description

IDSIBus backend for STM32 parts with a DSI host + LTDC (F469/ F479, F769/F779, H747/H757, U5x9, ...), built on STM32Cube HAL's HAL_DSI_* (command channel, adapted/video-mode DSI wrapper) and HAL_LTDC_* (the pixel-timing generator/framebuffer scanner DSI sits in front of on these parts - conceptually the same role ESP32-P4's DPI peripheral plays for DSIBusESP32).

UNVERIFIED ON REAL HARDWARE - unlike DSIBusESP32 (whose ESP32-P4 DPI path is exercised by boards this library ships examples for), no STM32-DSI board has been used to test this class. The DSI-video-timing math (HSA/HBP/HLINE expressed in DSI lane-byte-clock cycles, derived from the pixel-domain porches via the standard <pixels> * laneByteClk_kHz / dpiClock_kHz conversion) and the LTDC accumulated-timing fields follow the pattern used throughout ST's own DSI panel BSPs (e.g. the OTM8009A driver shipped with the STM32F769I-Discovery/STM32H747I-Discovery BSPs) - treat it as a documented starting point for board bring-up, not a guarantee.

Deliberately NOT in scope here: the DSI PHY PLL (dsiPllInit - NDIV/IDF/ ODF) and the LTDC pixel clock (normally routed off RCC PLL3 on these parts). Both depend on the board's external oscillator and are ordinarily produced by STM32CubeMX's generated SystemClock_Config() - this class takes the already-computed DSI_PLLInitTypeDef and LTDC pixel clock (in kHz) as constructor inputs rather than guessing at divisors that would silently be wrong for any board other than the one they were tuned for.

Only a single framebuffer is used (no double-buffering), same tradeoff DSIBusESP32 accepts - see that class's doc comment.

Constructor & Destructor Documentation

◆ DSIBusSTM32()

DSIBusSTM32 ( int8_t  rst,
size_t  width,
size_t  height,
uint8_t  laneNum,
uint32_t  laneMbps,
uint32_t  dpiClockKHz,
const DSI_PLLInitTypeDef &  pllInit,
uint16_t *  framebuffer 
)
inline
Parameters
rstpanel reset GPIO, -1 if unused
width/heightpanel resolution in pixels
laneNumnumber of DSI data lanes (1 or 2)
laneMbpsper-lane bit rate in Mbps (used only for the DSI video-timing conversion below - does NOT configure the DSI PHY PLL, see pllInit)
dpiClockKHzpixel clock in kHz that the caller has already arranged to feed the LTDC (typically via RCC PLL3), matching what pllInit was computed for
pllInitpre-computed DSI PHY PLL config (NDIV/IDF/ODF) for this board's external oscillator - normally CubeMX-generated
framebuffercaller-owned RGB565 framebuffer, width*height*2 bytes, placed by the caller in whatever RAM region the board's LTDC/DMA2D can actually read from (not every STM32 RAM region is - AXI SRAM/SDRAM are typical, not all of DTCM/ITCM)

Member Function Documentation

◆ begin()

bool begin ( )
inlineoverridevirtual

Powers up and configures the DSI PHY/lanes and the command channel, and pulses panel reset if the concrete bus owns that pin. After this returns true, writeCommand() can be used to send the panel's init register sequence. Does not yet start active video scan-out - see finishInit().

Implements IDSIBus.

◆ drawBitmap()

bool drawBitmap ( size_t  x0,
size_t  y0,
size_t  x1,
size_t  y1,
const uint8_t *  rgb565 
)
inlineoverridevirtual

Writes rgb565 (native RGB565 byte order, width*height*2 bytes, tightly packed) into the rectangle [x0,y0)-[x1,y1) of the live framebuffer. Returns false on transport failure.

Implements IDSIBus.

◆ end()

void end ( )
inlineoverridevirtual

Releases peripheral/PHY resources. Safe to call even if begin() was never called or already failed.

Implements IDSIBus.

◆ finishInit()

bool finishInit ( )
inlineoverridevirtual

Configures and starts the DSI video wrapper + LTDC framebuffer scan- out - the panel is expected to be fully initialized (sleep-out, display-on, ...) by this point via writeCommand().

Implements IDSIBus.

◆ setVideoTiming()

void setVideoTiming ( uint16_t  hsyncPulseWidth,
uint16_t  hsyncBackPorch,
uint16_t  hsyncFrontPorch,
uint16_t  vsyncPulseWidth,
uint16_t  vsyncBackPorch,
uint16_t  vsyncFrontPorch 
)
inline

Sets the panel's video timing (porches/sync widths, in pixels/ lines). Must be called before begin(); every panel documents its own values, there is no cross-panel default worth assuming.

◆ writeCommand()

bool writeCommand ( uint8_t  cmd,
const uint8_t *  param,
size_t  len 
)
inlineoverridevirtual

Sends one DCS/vendor register command with up to len parameter bytes over the DSI command channel. Returns false on transport failure.

Implements IDSIBus.


The documentation for this class was generated from the following file: