arduino-audio-driver
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SGTL5000.h
Go to the documentation of this file.
1
8#pragma once
9
11#include "DriverCommon.h"
12#include "Platforms/API_Delay.h"
13#include "Platforms/API_I2C.h"
14#include "stdbool.h"
15
16namespace audio_driver {
17
19constexpr int SGTL5000_ADDR = 0x0A;
21constexpr int SGTL5000_ADDR_CS_HIGH = 0x2A;
22
28class SGTL5000 {
29 public:
31 enum class Reg : uint16_t {
32 ChipId = 0x0000,
33 DigPower = 0x0002,
34 ClkCtrl = 0x0004,
35 I2SCtrl = 0x0006,
36 SssCtrl = 0x000A,
37 AdcDacCtrl = 0x000E,
38 DacVol = 0x0010,
39 PadStrength = 0x0014,
40 AnaAdcCtrl = 0x0020,
41 AnaHpCtrl = 0x0022,
42 AnaCtrl = 0x0024,
43 LinregCtrl = 0x0026,
44 RefCtrl = 0x0028,
45 MicCtrl = 0x002A,
46 LineOutCtrl = 0x002C,
47 LineOutVol = 0x002E,
48 AnaPower = 0x0030,
49 PllCtrl = 0x0032,
50 ClkTopCtrl = 0x0034,
51 AnaStatus = 0x0036,
52 ShortCtrl = 0x003C,
53 DapControl = 0x0100,
54 };
55
57 enum AnaCtrlBits : uint16_t {
58 MuteLineOut = 1 << 8,
61 MuteHeadphone = 1 << 4,
64 MuteAdc = 1 << 0,
65 };
66
68 enum I2SMode : uint16_t {
72 };
73
74 SGTL5000() = default;
75
77 void setWire(i2c_bus_handle_t handle) { i2c_handle = handle; }
78
80 void setAddress(int addr) { i2c_addr = addr; }
81
84 if (initialized) {
85 AD_LOGW("The SGTL5000 has already been initialized");
86 return RESULT_OK;
87 }
88 initialized = true;
89
90 // VDDD is externally driven (typical for the common breakout boards)
91 writeReg(Reg::AnaPower, 0x4060);
92 // VDDA & VDDIO both over 3.1V
94 // VAG=1.575V, normal ramp, +12.5% bias current
95 writeReg(Reg::RefCtrl, 0x01F2);
96 // LO_VAGCNTRL=1.65V, OUT_CURRENT=0.54mA
98 // allow up to 125mA on the short detectors
99 writeReg(Reg::ShortCtrl, 0x4446);
100 // enable zero cross detectors
101 ana_ctrl = 0x0137;
103
104 // power up lineout, headphone, adc, dac
105 writeReg(Reg::AnaPower, 0x40FF);
106 // power up all digital blocks (I2S in/out, DAC, ADC, DAP)
107 writeReg(Reg::DigPower, 0x0073);
108 delayMs(400);
109
110 // default line out level ~1.3Vp-p
111 writeReg(Reg::LineOutVol, 0x1D1D);
112
113 // route I2S_IN -> DAC and ADC -> I2S_OUT
114 writeReg(Reg::SssCtrl, 0x0010);
115 // unmute the DAC
116 writeReg(Reg::AdcDacCtrl, 0x0000);
117 // digital gain 0dB
118 writeReg(Reg::DacVol, 0x3C3C);
119
120 // configure the digital audio interface and sample rate
122
123 // set the default headphone/lineout volume and unmute
124 setVoiceVolume(70);
125
126 return RESULT_OK;
127 }
128
131 setVoiceMute(true);
132 // power down all analogue and digital blocks
133 writeReg(Reg::AnaPower, 0x0000);
134 writeReg(Reg::DigPower, 0x0000);
135 initialized = false;
136 return RESULT_OK;
137 }
138
140 error_t ctrlStateActive(codec_mode_t mode, bool ctrl_state_active) {
141 return setVoiceMute(!ctrl_state_active);
142 }
143
146 uint16_t i2s_ctrl = 0;
147
148 switch (iface->fmt) {
149 case I2S_LEFT:
150 i2s_ctrl |= (I2SModeI2SOrLeftJustified << 2) | (1 << 1); // LRALIGN=1
151 break;
152 case I2S_RIGHT:
153 i2s_ctrl |= (I2SModeRightJustified << 2);
154 break;
155 case I2S_DSP:
156 i2s_ctrl |= (I2SModePcm << 2);
157 break;
158 case I2S_NORMAL:
159 default:
160 i2s_ctrl |= (I2SModeI2SOrLeftJustified << 2); // LRALIGN=0
161 break;
162 }
163
164 switch (iface->bits) {
166 i2s_ctrl |= (0x2 << 4);
167 break;
169 i2s_ctrl |= (0x1 << 4);
170 break;
172 i2s_ctrl |= (0x0 << 4);
173 break;
175 default:
176 i2s_ctrl |= (0x3 << 4);
177 break;
178 }
179
180 if (iface->mode == MODE_MASTER) {
181 i2s_ctrl |= (1 << 7);
182 }
183
184 writeReg(Reg::I2SCtrl, i2s_ctrl);
186 return RESULT_OK;
187 }
188
190 error_t setVoiceMute(bool enable) {
191 if (enable) {
193 } else {
195 }
197 }
198
204 if (volume < 0) volume = 0;
205 if (volume > 100) volume = 100;
206 voice_volume = volume;
207
208 if (volume == 0) {
209 return setVoiceMute(true);
210 }
211
212 // 0x00 = +12dB ... 0x7F = -51.5dB, 0.5dB steps
213 uint16_t reg_value = 0x7F - ((volume * 0x7F) / 100);
214 error_t ret = writeReg(Reg::AnaHpCtrl, reg_value | (reg_value << 8));
215 ret |= setVoiceMute(false);
216 return ret;
217 }
218
220 error_t getVoiceVolume(int* volume) {
221 *volume = voice_volume;
222 return RESULT_OK;
223 }
224
226 uint16_t readReg(Reg reg) {
227 uint16_t reg_addr = static_cast<uint16_t>(reg);
228 uint8_t addr_bytes[2] = {(uint8_t)(reg_addr >> 8),
229 (uint8_t)(reg_addr & 0xFF)};
230 uint8_t data[2] = {0, 0};
231 i2c_bus_read_bytes(i2c_handle, i2c_addr, addr_bytes, 2, data, 2);
232 return ((uint16_t)data[0] << 8) | data[1];
233 }
234
236 error_t writeReg(Reg reg, uint16_t value) {
237 uint16_t reg_addr = static_cast<uint16_t>(reg);
238 uint8_t addr_bytes[2] = {(uint8_t)(reg_addr >> 8),
239 (uint8_t)(reg_addr & 0xFF)};
240 uint8_t data[2] = {(uint8_t)(value >> 8), (uint8_t)(value & 0xFF)};
241 return i2c_bus_write_bytes(i2c_handle, i2c_addr, addr_bytes, 2, data, 2);
242 }
243
249 uint16_t getClkCtrl(samplerate_t rate) {
250 uint16_t sys_fs;
251 switch (rate) {
252 case RATE_32K:
253 sys_fs = 0x0;
254 break;
255 case RATE_44K:
256 sys_fs = 0x1;
257 break;
258 case RATE_96K:
259 sys_fs = 0x3;
260 break;
261 case RATE_48K:
262 default:
263 sys_fs = 0x2;
264 break;
265 }
266 // RATE_MODE=0 (SYS_FS specifies the rate), MCLK_FREQ=0 (256*Fs)
267 return (sys_fs << 2);
268 }
269
270 protected:
273 bool initialized = false;
274 uint16_t ana_ctrl = 0;
275 int voice_volume = 70;
276};
277
278} // namespace audio_driver
#define RESULT_OK
Definition DriverCommon.h:74
#define AD_LOGW(...)
Definition Logger.h:14
Header-only driver class for the SGTL5000 codec chip.
Definition SGTL5000.h:28
Reg
SGTL5000 register addresses.
Definition SGTL5000.h:31
error_t ctrlStateActive(codec_mode_t mode, bool ctrl_state_active)
Activate or mute the codec.
Definition SGTL5000.h:140
uint16_t ana_ctrl
Definition SGTL5000.h:274
void setAddress(int addr)
Defines the I2C device address.
Definition SGTL5000.h:80
error_t init(codec_config_t *cfg)
Initialize the SGTL5000 codec chip.
Definition SGTL5000.h:83
error_t deinit(void)
Deinitialize the SGTL5000 codec chip.
Definition SGTL5000.h:130
I2SMode
I2S_MODE field of the I2S_CTRL register (0x0006)
Definition SGTL5000.h:68
@ I2SModeI2SOrLeftJustified
Definition SGTL5000.h:69
@ I2SModePcm
Definition SGTL5000.h:71
@ I2SModeRightJustified
Definition SGTL5000.h:70
error_t setVoiceMute(bool enable)
Mute / unmute the headphone and line outputs.
Definition SGTL5000.h:190
int i2c_addr
Definition SGTL5000.h:272
uint16_t readReg(Reg reg)
Read a 16 bit value from a SGTL5000 register.
Definition SGTL5000.h:226
error_t configI2S(codec_mode_t mode, I2SDefinition *iface)
Configure the digital audio interface format and sample rate.
Definition SGTL5000.h:145
error_t writeReg(Reg reg, uint16_t value)
Write a 16 bit value to a SGTL5000 register.
Definition SGTL5000.h:236
void setWire(i2c_bus_handle_t handle)
Defines the I2C bus instance to be used.
Definition SGTL5000.h:77
i2c_bus_handle_t i2c_handle
Definition SGTL5000.h:271
error_t setVoiceVolume(int volume)
Set the headphone / line output volume.
Definition SGTL5000.h:203
int voice_volume
Definition SGTL5000.h:275
AnaCtrlBits
Bit flags for the ANA_CTRL register (0x0024)
Definition SGTL5000.h:57
@ MuteHeadphone
Definition SGTL5000.h:61
@ EnableZeroCrossAdc
Definition SGTL5000.h:63
@ MuteLineOut
Definition SGTL5000.h:58
@ EnableZeroCrossHp
Definition SGTL5000.h:60
@ SelectHeadphoneLineIn
Definition SGTL5000.h:59
@ SelectAdcLineIn
Definition SGTL5000.h:62
@ MuteAdc
Definition SGTL5000.h:64
uint16_t getClkCtrl(samplerate_t rate)
Determine the CLK_CTRL register value for the requested sample rate.
Definition SGTL5000.h:249
error_t getVoiceVolume(int *volume)
Get the headphone / line output volume (0~100)
Definition SGTL5000.h:220
bool initialized
Definition SGTL5000.h:273
Namespace for audio driver components.
Definition AudioBoard.h:5
void delayMs(unsigned long ms)
Definition API_Delay.h:19
@ BIT_LENGTH_24BITS
Definition DriverCommon.h:240
@ BIT_LENGTH_20BITS
Definition DriverCommon.h:239
@ BIT_LENGTH_32BITS
Definition DriverCommon.h:241
@ BIT_LENGTH_16BITS
Definition DriverCommon.h:237
constexpr int SGTL5000_ADDR
7-bit I2C address with CTRL_ADR0_CS pin low (normal configuration)
Definition SGTL5000.h:19
codec_mode_t
Definition DriverCommon.h:290
@ CODEC_MODE_BOTH
Definition DriverCommon.h:295
int error_t
Definition DriverCommon.h:150
samplerate_t
Definition DriverCommon.h:213
@ RATE_44K
Definition DriverCommon.h:220
@ RATE_32K
Definition DriverCommon.h:219
@ RATE_96K
Definition DriverCommon.h:224
@ RATE_48K
Definition DriverCommon.h:221
constexpr int SGTL5000_ADDR_CS_HIGH
7-bit I2C address with CTRL_ADR0_CS pin high
Definition SGTL5000.h:21
@ I2S_RIGHT
Definition DriverCommon.h:253
@ I2S_DSP
Definition DriverCommon.h:254
@ I2S_LEFT
Definition DriverCommon.h:252
@ I2S_NORMAL
Definition DriverCommon.h:251
@ MODE_MASTER
Definition DriverCommon.h:205
void * i2c_bus_handle_t
Definition DriverCommon.h:155
I2S interface parameters for the audio codec.
Definition DriverCommon.h:384
i2s_format_t fmt
Definition DriverCommon.h:386
samplerate_t rate
Definition DriverCommon.h:387
i2s_master_slave_t mode
Definition DriverCommon.h:385
sample_bits_t bits
Definition DriverCommon.h:388
Top-level codec configuration passed to the audio driver at init.
Definition DriverCommon.h:397
I2SDefinition i2s
Definition DriverCommon.h:400