arduino-audio-driver
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ES8311.h
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1/*
2 * ESPRESSIF MIT License
3 *
4 * Copyright (c) 2019 <ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD>
5 *
6 * Permission is hereby granted for use on all ESPRESSIF SYSTEMS products, in
7 * which case, it is free of charge, to any person obtaining a copy of this
8 * software and associated documentation files (the "Software"), to deal in the
9 * Software without restriction, including without limitation the rights to use,
10 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do
12 * so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 */
26#pragma once
27
29#include "DriverCommon.h"
30#include "Platforms/API_I2C.h"
31#include "stdbool.h"
32#include <assert.h>
33#include <math.h>
34#include <string.h>
35
36
37namespace audio_driver {
38
51
52/*
53 * Clock coefficient structer
54 */
56 uint32_t mclk; /* mclk frequency */
57 uint32_t rate; /* sample rate */
58 uint8_t pre_div; /* the pre divider with range from 1 to 8 */
59 uint8_t pre_multi; /* the pre multiplier with x1, x2, x4 and x8 selection */
60 uint8_t adc_div; /* adcclk divider */
61 uint8_t dac_div; /* dacclk divider */
62 uint8_t fs_mode; /* double speed or single speed, =0, ss, =1, ds */
63 uint8_t lrck_h; /* adclrck divider and daclrck divider */
64 uint8_t lrck_l;
65 uint8_t bclk_div; /* sclk divider */
66 uint8_t adc_osr; /* adc osr */
67 uint8_t dac_osr; /* dac osr */
68};
69
70/* codec hifi mclk clock divider coefficients */
71static const struct es8311_coeff_div es8311_coeff_div[] = {
72 // mclk rate pre_div mult adc_div dac_div fs_mode lrch lrcl bckdiv
73 // osr
74 /* 8k */
75 {12288000, 8000, 0x06, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
76 0x10},
77 {18432000, 8000, 0x03, 0x02, 0x03, 0x03, 0x00, 0x05, 0xff, 0x18, 0x10,
78 0x10},
79 {16384000, 8000, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
80 0x10},
81 {8192000, 8000, 0x04, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10, 0x10},
82 {6144000, 8000, 0x03, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10, 0x10},
83 {4096000, 8000, 0x02, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10, 0x10},
84 {3072000, 8000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10, 0x10},
85 {2048000, 8000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10, 0x10},
86 {1536000, 8000, 0x03, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10, 0x10},
87 {1024000, 8000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10, 0x10},
88
89 /* 11.025k */
90 {11289600, 11025, 0x04, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
91 0x10},
92 {5644800, 11025, 0x02, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
93 0x10},
94 {2822400, 11025, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
95 0x10},
96 {1411200, 11025, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
97 0x10},
98
99 /* 12k */
100 {12288000, 12000, 0x04, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
101 0x10},
102 {6144000, 12000, 0x02, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
103 0x10},
104 {3072000, 12000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
105 0x10},
106 {1536000, 12000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
107 0x10},
108
109 /* 16k */
110 {12288000, 16000, 0x03, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
111 0x10},
112 {18432000, 16000, 0x03, 0x02, 0x03, 0x03, 0x00, 0x02, 0xff, 0x0c, 0x10,
113 0x10},
114 {16384000, 16000, 0x04, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
115 0x10},
116 {8192000, 16000, 0x02, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
117 0x10},
118 {6144000, 16000, 0x03, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
119 0x10},
120 {4096000, 16000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
121 0x10},
122 {3072000, 16000, 0x03, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
123 0x10},
124 {2048000, 16000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
125 0x10},
126 {1536000, 16000, 0x03, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
127 0x10},
128 {1024000, 16000, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
129 0x10},
130
131 /* 22.05k */
132 {11289600, 22050, 0x02, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
133 0x10},
134 {5644800, 22050, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
135 0x10},
136 {2822400, 22050, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
137 0x10},
138 {1411200, 22050, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
139 0x10},
140
141 /* 24k */
142 {12288000, 24000, 0x02, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
143 0x10},
144 {18432000, 24000, 0x03, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
145 0x10},
146 {6144000, 24000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
147 0x10},
148 {3072000, 24000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
149 0x10},
150 {1536000, 24000, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
151 0x10},
152
153 /* 32k */
154 {12288000, 32000, 0x03, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
155 0x10},
156 {18432000, 32000, 0x03, 0x04, 0x03, 0x03, 0x00, 0x02, 0xff, 0x0c, 0x10,
157 0x10},
158 {16384000, 32000, 0x02, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
159 0x10},
160 {8192000, 32000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
161 0x10},
162 {6144000, 32000, 0x03, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
163 0x10},
164 {4096000, 32000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
165 0x10},
166 {3072000, 32000, 0x03, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
167 0x10},
168 {2048000, 32000, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
169 0x10},
170 {1536000, 32000, 0x03, 0x08, 0x01, 0x01, 0x01, 0x00, 0x7f, 0x02, 0x10,
171 0x10},
172 {1024000, 32000, 0x01, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
173 0x10},
174
175 /* 44.1k */
176 {11289600, 44100, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
177 0x10},
178 {5644800, 44100, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
179 0x10},
180 {2822400, 44100, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
181 0x10},
182 {1411200, 44100, 0x01, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
183 0x10},
184
185 /* 48k */
186 {12288000, 48000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
187 0x10},
188 {18432000, 48000, 0x03, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
189 0x10},
190 {6144000, 48000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
191 0x10},
192 {3072000, 48000, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
193 0x10},
194 {1536000, 48000, 0x01, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
195 0x10},
196
197 /* 64k */
198 {12288000, 64000, 0x03, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
199 0x10},
200 {18432000, 64000, 0x03, 0x04, 0x03, 0x03, 0x01, 0x01, 0x7f, 0x06, 0x10,
201 0x10},
202 {16384000, 64000, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
203 0x10},
204 {8192000, 64000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
205 0x10},
206 {6144000, 64000, 0x01, 0x04, 0x03, 0x03, 0x01, 0x01, 0x7f, 0x06, 0x10,
207 0x10},
208 {4096000, 64000, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
209 0x10},
210 {3072000, 64000, 0x01, 0x08, 0x03, 0x03, 0x01, 0x01, 0x7f, 0x06, 0x10,
211 0x10},
212 {2048000, 64000, 0x01, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
213 0x10},
214 {1536000, 64000, 0x01, 0x08, 0x01, 0x01, 0x01, 0x00, 0xbf, 0x03, 0x18,
215 0x18},
216 {1024000, 64000, 0x01, 0x08, 0x01, 0x01, 0x01, 0x00, 0x7f, 0x02, 0x10,
217 0x10},
218
219 /* 88.2k */
220 {11289600, 88200, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
221 0x10},
222 {5644800, 88200, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
223 0x10},
224 {2822400, 88200, 0x01, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
225 0x10},
226 {1411200, 88200, 0x01, 0x08, 0x01, 0x01, 0x01, 0x00, 0x7f, 0x02, 0x10,
227 0x10},
228
229 /* 96k */
230 {12288000, 96000, 0x01, 0x02, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
231 0x10},
232 {18432000, 96000, 0x03, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
233 0x10},
234 {6144000, 96000, 0x01, 0x04, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
235 0x10},
236 {3072000, 96000, 0x01, 0x08, 0x01, 0x01, 0x00, 0x00, 0xff, 0x04, 0x10,
237 0x10},
238 {1536000, 96000, 0x01, 0x08, 0x01, 0x01, 0x01, 0x00, 0x7f, 0x02, 0x10,
239 0x10},
240};
241
247class ES8311 {
248 public:
249 static constexpr int ES8311_ADDR = 0x18;
250 static constexpr int FROM_MCLK_PIN = 0;
251 static constexpr int FROM_SCLK_PIN = 1;
252 static constexpr int INVERT_MCLK = 0;
253 static constexpr int INVERT_SCLK = 0;
254 static constexpr int IS_DMIC = 0;
255 static constexpr int MCLK_DIV_FRE = 256;
256 static constexpr uint8_t ES8311_RESET_REG00 = 0x00;
257 static constexpr uint8_t ES8311_CLK_MANAGER_REG01 = 0x01;
258 static constexpr uint8_t ES8311_CLK_MANAGER_REG02 = 0x02;
259 static constexpr uint8_t ES8311_CLK_MANAGER_REG03 = 0x03;
260 static constexpr uint8_t ES8311_CLK_MANAGER_REG04 = 0x04;
261 static constexpr uint8_t ES8311_CLK_MANAGER_REG05 = 0x05;
262 static constexpr uint8_t ES8311_CLK_MANAGER_REG06 = 0x06;
263 static constexpr uint8_t ES8311_CLK_MANAGER_REG07 = 0x07;
264 static constexpr uint8_t ES8311_CLK_MANAGER_REG08 = 0x08;
265 static constexpr uint8_t ES8311_SDPIN_REG09 = 0x09;
266 static constexpr uint8_t ES8311_SDPOUT_REG0A = 0x0A;
267 static constexpr uint8_t ES8311_SYSTEM_REG0B = 0x0B;
268 static constexpr uint8_t ES8311_SYSTEM_REG0C = 0x0C;
269 static constexpr uint8_t ES8311_SYSTEM_REG0D = 0x0D;
270 static constexpr uint8_t ES8311_SYSTEM_REG0E = 0x0E;
271 static constexpr uint8_t ES8311_SYSTEM_REG0F = 0x0F;
272 static constexpr uint8_t ES8311_SYSTEM_REG10 = 0x10;
273 static constexpr uint8_t ES8311_SYSTEM_REG11 = 0x11;
274 static constexpr uint8_t ES8311_SYSTEM_REG12 = 0x12;
275 static constexpr uint8_t ES8311_SYSTEM_REG13 = 0x13;
276 static constexpr uint8_t ES8311_SYSTEM_REG14 = 0x14;
277 static constexpr uint8_t ES8311_ADC_REG15 = 0x15;
278 static constexpr uint8_t ES8311_ADC_REG16 = 0x16;
279 static constexpr uint8_t ES8311_ADC_REG17 = 0x17;
280 static constexpr uint8_t ES8311_ADC_REG18 = 0x18;
281 static constexpr uint8_t ES8311_ADC_REG19 = 0x19;
282 static constexpr uint8_t ES8311_ADC_REG1A = 0x1A;
283 static constexpr uint8_t ES8311_ADC_REG1B = 0x1B;
284 static constexpr uint8_t ES8311_ADC_REG1C = 0x1C;
285 static constexpr uint8_t ES8311_DAC_REG31 = 0x31;
286 static constexpr uint8_t ES8311_DAC_REG32 = 0x32;
287 static constexpr uint8_t ES8311_DAC_REG33 = 0x33;
288 static constexpr uint8_t ES8311_DAC_REG34 = 0x34;
289 static constexpr uint8_t ES8311_DAC_REG35 = 0x35;
290 static constexpr uint8_t ES8311_DAC_REG37 = 0x37;
291 static constexpr uint8_t ES8311_GPIO_REG44 = 0x44;
292 static constexpr uint8_t ES8311_GP_REG45 = 0x45;
293 static constexpr uint8_t ES8311_CHD1_REGFD = 0xFD;
294 static constexpr uint8_t ES8311_CHD2_REGFE = 0xFE;
295 static constexpr uint8_t ES8311_CHVER_REGFF = 0xFF;
296 static constexpr uint8_t ES8311_MAX_REGISTER = 0xFF;
297 static constexpr int bitVal(int nr) { return 1 << nr; }
298 ES8311() = default;
299
301 void setWire(i2c_bus_handle_t handle) { i2c_handle = handle; }
302
304 void setAddress(int addr) {
305 if (addr > 0) i2c_addr = addr;
306 }
307
309 void setMclkSrc(int8_t src) { mclk_src = src; }
310 int8_t getMclkSrc(void) { return mclk_src; }
311
314 uint8_t datmp, regv;
315 int coeff;
316 error_t ret = RESULT_OK;
317 assert(i2c_handle != NULL);
318
322 ret |= writeReg(ES8311_ADC_REG16, 0x24);
325 ret |= writeReg(ES8311_SYSTEM_REG0B, 0x00);
326 ret |= writeReg(ES8311_SYSTEM_REG0C, 0x00);
327 ret |= writeReg(ES8311_SYSTEM_REG10, 0x1F);
328 ret |= writeReg(ES8311_SYSTEM_REG11, 0x7F);
329 ret |= writeReg(ES8311_RESET_REG00, 0x80);
330 /*
331 * Set Codec into Master or Slave mode
332 */
334 /*
335 * Set master/slave audio interface
336 */
337 I2SDefinition* i2s_cfg = &(codec_cfg->i2s);
338 switch (i2s_cfg->mode) {
339 case MODE_MASTER: /* MASTER MODE */
340 AD_LOGI("ES8311 in Master mode");
341 regv |= 0x40;
342 break;
343 case MODE_SLAVE: /* SLAVE MODE */
344 AD_LOGI("ES8311 in Slave mode");
345 regv &= 0xBF;
346 break;
347 default:
348 regv &= 0xBF;
349 }
350 ret |= writeReg(ES8311_RESET_REG00, regv);
352 /*
353 * Select clock source for internal mclk
354 */
355 switch (getMclkSrc()) {
356 case FROM_MCLK_PIN:
357 AD_LOGI("ES8311 clock source: MCLK");
359 regv &= 0x7F;
361 break;
362 case FROM_SCLK_PIN:
363 AD_LOGI("ES8311 clock source: SCLK");
365 regv |= 0x80;
367 break;
368 default:
369 AD_LOGI("ES8311 clock source: MCLK");
371 regv &= 0x7F;
373 break;
374 }
375 int sample_fre = 0;
376 int mclk_fre = 0;
377 switch (i2s_cfg->rate) {
378 case RATE_8K:
379 sample_fre = 8000;
380 break;
381 case RATE_11K:
382 sample_fre = 11025;
383 break;
384 case RATE_16K:
385 sample_fre = 16000;
386 break;
387 case RATE_22K:
388 sample_fre = 22050;
389 break;
390 case RATE_24K:
391 sample_fre = 24000;
392 break;
393 case RATE_32K:
394 sample_fre = 32000;
395 break;
396 case RATE_44K:
397 sample_fre = 44100;
398 break;
399 case RATE_48K:
400 sample_fre = 48000;
401 break;
402 default:
403 AD_LOGE("Unable to configure sample rate %dHz", sample_fre);
404 break;
405 }
406 mclk_fre = sample_fre * MCLK_DIV_FRE;
407 coeff = getCoeff(mclk_fre, sample_fre);
408 if (coeff < 0) {
409 AD_LOGE("Unable to configure sample rate %dHz with %dHz MCLK", sample_fre,
410 mclk_fre);
411 return RESULT_FAIL;
412 }
413 /*
414 * Set clock parammeters
415 */
416 if (coeff >= 0) {
417 regv = readReg(ES8311_CLK_MANAGER_REG02) & 0x07;
418 regv |= (es8311_coeff_div[coeff].pre_div - 1) << 5;
419 datmp = 0;
420 switch (es8311_coeff_div[coeff].pre_multi) {
421 case 1:
422 datmp = 0;
423 break;
424 case 2:
425 datmp = 1;
426 break;
427 case 4:
428 datmp = 2;
429 break;
430 case 8:
431 datmp = 3;
432 break;
433 default:
434 break;
435 }
436
437 if (getMclkSrc() == FROM_SCLK_PIN) {
438 datmp = 3; /* DIG_MCLK = LRCK * 256 = BCLK * 8 */
439 }
440 regv |= (datmp) << 3;
442
443 regv = readReg(ES8311_CLK_MANAGER_REG05) & 0x00;
444 regv |= (es8311_coeff_div[coeff].adc_div - 1) << 4;
445 regv |= (es8311_coeff_div[coeff].dac_div - 1) << 0;
447
448 regv = readReg(ES8311_CLK_MANAGER_REG03) & 0x80;
449 regv |= es8311_coeff_div[coeff].fs_mode << 6;
450 regv |= es8311_coeff_div[coeff].adc_osr << 0;
452
453 regv = readReg(ES8311_CLK_MANAGER_REG04) & 0x80;
454 regv |= es8311_coeff_div[coeff].dac_osr << 0;
456
457 regv = readReg(ES8311_CLK_MANAGER_REG07) & 0xC0;
458 regv |= es8311_coeff_div[coeff].lrck_h << 0;
460
461 regv = readReg(ES8311_CLK_MANAGER_REG08) & 0x00;
462 regv |= es8311_coeff_div[coeff].lrck_l << 0;
464
465 regv = readReg(ES8311_CLK_MANAGER_REG06) & 0xE0;
466 if (es8311_coeff_div[coeff].bclk_div < 19) {
467 regv |= (es8311_coeff_div[coeff].bclk_div - 1) << 0;
468 } else {
469 regv |= (es8311_coeff_div[coeff].bclk_div) << 0;
470 }
472 }
473
474 /*
475 * mclk inverted or not
476 */
477 if (INVERT_MCLK) {
479 regv |= 0x40;
481 } else {
483 regv &= ~(0x40);
485 }
486 /*
487 * sclk inverted or not
488 */
489 if (INVERT_SCLK) {
491 regv |= 0x20;
493 } else {
495 regv &= ~(0x20);
497 }
498
499 ret |= writeReg(ES8311_SYSTEM_REG13, 0x10);
500 ret |= writeReg(ES8311_ADC_REG1B, 0x0A);
501 ret |= writeReg(ES8311_ADC_REG1C, 0x6A);
502
503 // setPaPower(true);
504 return RESULT_OK;
505 }
506
509
512 int ret = RESULT_OK;
513 ret |= setBitsPerSample(iface->bits);
514 ret |= configFmt(*iface);
515 return ret;
516 }
517
519 error_t ctrlStateActive(codec_mode_t mode, bool ctrl_state_active) {
520 error_t ret = RESULT_OK;
522
523 switch (mode) {
525 es_mode = CODEC_MODE_ENCODE;
526 break;
528 es_mode = CODEC_MODE_LINE_IN;
529 break;
531 es_mode = CODEC_MODE_DECODE;
532 break;
533 case CODEC_MODE_BOTH:
534 es_mode = CODEC_MODE_BOTH;
535 break;
536 default:
537 es_mode = CODEC_MODE_DECODE;
538 AD_LOGW("Codec mode not support, default is decode mode");
539 break;
540 }
541
542 if (ctrl_state_active) {
543 ret |= start(es_mode);
544 } else {
545 AD_LOGW("The codec is about to stop");
546 ret |= stop(es_mode);
547 }
548
549 return ret;
550 }
551
554 AD_LOGD("setVoiceVolume:%d", volume);
555 if (i2c_handle == 0) return RESULT_FAIL;
556 error_t res = RESULT_OK;
557 if (volume < 0) {
558 volume = 0;
559 } else if (volume > 100) {
560 volume = 100;
561 }
562 // Use a logarithmic scale for more natural volume control
563 int vol = 0;
564 if (volume == 0) {
565 vol = 0;
566 } else {
567 vol = (int)(255.0 * log10(9.0 * volume / 100.0 + 1.0) / log10(10.0));
568 }
570 return res;
571 }
572
574 error_t getVoiceVolume(int* volume) {
575 if (i2c_handle == 0) return RESULT_FAIL;
576 error_t res = RESULT_OK;
577 int regv = 0;
579 if (regv == RESULT_FAIL) {
580 *volume = 0;
581 res = RESULT_FAIL;
582 } else {
583 // Inverse of the logarithmic mapping used in setVoiceVolume
584 if (regv <= 0) {
585 *volume = 0;
586 } else {
587 double v = (double)regv / 255.0;
588 *volume = (int)((pow(10.0, v * log10(10.0)) - 1.0) / 9.0 * 100.0 + 0.5);
589 if (*volume > 100) *volume = 100;
590 }
591 }
592 AD_LOGD("GET: res:%d, volume:%d", regv, *volume);
593 return res;
594 }
595
597 error_t setVoiceMute(bool enable) {
598 AD_LOGD("setVoiceMute volume:%d", enable);
599 if (i2c_handle == 0) return RESULT_FAIL;
600 mute(enable);
601 return RESULT_OK;
602 }
603
606 if (i2c_handle == 0) return RESULT_FAIL;
607 error_t res = RESULT_OK;
608 uint8_t reg = 0;
610 if (res != RESULT_FAIL) {
611 reg = (res & 0x20) >> 5;
612 }
613 *mute = reg;
614 return res;
615 }
616
619 if (i2c_handle == 0) return RESULT_FAIL;
620 error_t res = RESULT_OK;
621 res = writeReg(ES8311_ADC_REG16, gain_db); // MIC gain scale
622 return res;
623 }
624
626 void readAll() {
627 for (int i = 0; i < 0x4A; i++) {
628 uint8_t reg = readReg(i);
629 AD_LOGI("REG:%02x, %02x", reg, i);
630 }
631 }
632 error_t writeReg(uint8_t reg_addr, uint8_t data) {
633 return i2c_bus_write_bytes(i2c_handle, i2c_addr, &reg_addr,
634 sizeof(reg_addr), &data, sizeof(data));
635 }
636
637 int readReg(uint8_t reg_addr) {
638 uint8_t data;
639 i2c_bus_read_bytes(i2c_handle, i2c_addr, &reg_addr, sizeof(reg_addr),
640 &data, sizeof(data));
641 return (int)data;
642 }
643
645 int getCoeff(uint32_t mclk, uint32_t rate) {
646 for (unsigned i = 0;
647 i < (sizeof(es8311_coeff_div) / sizeof(es8311_coeff_div[0])); i++) {
648 if (es8311_coeff_div[i].rate == rate && es8311_coeff_div[i].mclk == mclk)
649 return i;
650 }
651 return -1;
652 }
653
655 void mute(int do_mute) {
656 uint8_t regv;
657 AD_LOGI("Enter into mute(), mute = %d", do_mute);
658 regv = readReg(ES8311_DAC_REG31) & 0x9f;
659 if (do_mute) {
661 writeReg(ES8311_DAC_REG31, regv | 0x60);
664 } else {
667 }
668 }
669
671 void suspend(void) {
672 AD_LOGI("Enter into suspend()");
682 }
683
686 error_t ret = RESULT_OK;
687 uint8_t adc_iface = 0, dac_iface = 0;
688 dac_iface = readReg(ES8311_SDPIN_REG09);
689 adc_iface = readReg(ES8311_SDPOUT_REG0A);
690 switch (fmt.fmt) {
691 case I2S_NORMAL:
692 AD_LOGD("ES8311 in I2S Format");
693 dac_iface &= 0xFC;
694 adc_iface &= 0xFC;
695 break;
696 case I2S_LEFT:
697 case I2S_RIGHT:
698 AD_LOGD("ES8311 in LJ Format");
699 adc_iface &= 0xFC;
700 dac_iface &= 0xFC;
701 adc_iface |= 0x01;
702 dac_iface |= 0x01;
703 break;
704 case I2S_DSP:
705 AD_LOGD("ES8311 in DSP-A Format");
706 adc_iface &= 0xDC;
707 dac_iface &= 0xDC;
708 adc_iface |= 0x03;
709 dac_iface |= 0x03;
710 break;
711 default:
712 dac_iface &= 0xFC;
713 adc_iface &= 0xFC;
714 break;
715 }
716 ret |= writeReg(ES8311_SDPIN_REG09, dac_iface);
717 ret |= writeReg(ES8311_SDPOUT_REG0A, adc_iface);
718
719 return ret;
720 }
721
724 error_t ret = RESULT_OK;
725 uint8_t adc_iface = 0, dac_iface = 0;
726 dac_iface = readReg(ES8311_SDPIN_REG09);
727 adc_iface = readReg(ES8311_SDPOUT_REG0A);
728 switch (bits) {
730 dac_iface |= 0x0c;
731 adc_iface |= 0x0c;
732 break;
734 break;
736 dac_iface |= 0x10;
737 adc_iface |= 0x10;
738 break;
739 default:
740 dac_iface |= 0x0c;
741 adc_iface |= 0x0c;
742 break;
743 }
744 ret |= writeReg(ES8311_SDPIN_REG09, dac_iface);
745 ret |= writeReg(ES8311_SDPOUT_REG0A, adc_iface);
746
747 return ret;
748 }
749
752 error_t ret = RESULT_OK;
753 uint8_t adc_iface = 0, dac_iface = 0;
754
755 dac_iface = readReg(ES8311_SDPIN_REG09) & 0xBF;
756 adc_iface = readReg(ES8311_SDPOUT_REG0A) & 0xBF;
757 adc_iface |= bitVal(6);
758 dac_iface |= bitVal(6);
759
760 if (mode == CODEC_MODE_LINE_IN) {
761 AD_LOGE("The codec es8311 doesn't support CODEC_MODE_LINE_IN mode");
762 return RESULT_FAIL;
763 }
764 if (mode == CODEC_MODE_ENCODE || mode == CODEC_MODE_BOTH) {
765 adc_iface &= ~(bitVal(6));
766 }
767 if (mode == CODEC_MODE_DECODE || mode == CODEC_MODE_BOTH) {
768 dac_iface &= ~(bitVal(6));
769 }
770
771 ret |= writeReg(ES8311_SDPIN_REG09, dac_iface);
772 ret |= writeReg(ES8311_SDPOUT_REG0A, adc_iface);
773
774 ret |= writeReg(ES8311_ADC_REG17, 0xBF);
775 ret |= writeReg(ES8311_SYSTEM_REG0E, 0x02);
776 ret |= writeReg(ES8311_SYSTEM_REG12, 0x00);
777 ret |= writeReg(ES8311_SYSTEM_REG14, 0x1A);
778
779 /*
780 * pdm dmic enable or disable
781 */
782 int regv = 0;
783 if (IS_DMIC) {
785 regv |= 0x40;
786 ret |= writeReg(ES8311_SYSTEM_REG14, regv);
787 } else {
789 regv &= ~(0x40);
790 ret |= writeReg(ES8311_SYSTEM_REG14, regv);
791 }
792
793 ret |= writeReg(ES8311_SYSTEM_REG0D, 0x01);
794 ret |= writeReg(ES8311_ADC_REG15, 0x40);
795 ret |= writeReg(ES8311_DAC_REG37, 0x48);
796 ret |= writeReg(ES8311_GP_REG45, 0x00);
797
798 return ret;
799 }
800
803 error_t ret = RESULT_OK;
804 suspend();
805 return ret;
806 }
807
808 protected:
811 int8_t mclk_src = 0;
812};
813
814} /* namespace audio_driver */
#define RESULT_OK
Definition DriverCommon.h:74
#define RESULT_FAIL
Definition DriverCommon.h:75
#define AD_LOGD(...)
Definition Logger.h:12
#define AD_LOGI(...)
Definition Logger.h:13
#define AD_LOGE(...)
Definition Logger.h:15
#define AD_LOGW(...)
Definition Logger.h:14
Header-only driver class for the ES8311 codec chip.
Definition ES8311.h:247
static constexpr uint8_t ES8311_DAC_REG37
Definition ES8311.h:290
static constexpr uint8_t ES8311_CLK_MANAGER_REG02
Definition ES8311.h:258
error_t deinit()
Deinitialize ES8311 codec chip.
Definition ES8311.h:508
static constexpr uint8_t ES8311_SYSTEM_REG0D
Definition ES8311.h:269
static constexpr uint8_t ES8311_CLK_MANAGER_REG08
Definition ES8311.h:264
error_t ctrlStateActive(codec_mode_t mode, bool ctrl_state_active)
Control ES8311 codec chip.
Definition ES8311.h:519
error_t getVoiceMute(int *mute)
Get ES8311 DAC mute status.
Definition ES8311.h:605
static constexpr uint8_t ES8311_ADC_REG1B
Definition ES8311.h:283
static constexpr uint8_t ES8311_SYSTEM_REG12
Definition ES8311.h:274
static constexpr uint8_t ES8311_CHD2_REGFE
Definition ES8311.h:294
static constexpr uint8_t ES8311_ADC_REG1C
Definition ES8311.h:284
static constexpr uint8_t ES8311_RESET_REG00
Definition ES8311.h:256
void setAddress(int addr)
Defines the I2C device address.
Definition ES8311.h:304
static constexpr uint8_t ES8311_SDPOUT_REG0A
Definition ES8311.h:266
static constexpr uint8_t ES8311_CLK_MANAGER_REG01
Definition ES8311.h:257
error_t setMicGain(es8311_mic_gain_t gain_db)
Set ES8311 mic gain.
Definition ES8311.h:618
static constexpr int ES8311_ADDR
Definition ES8311.h:249
void mute(int do_mute)
set es8311 dac mute (1) or unmute (0)
Definition ES8311.h:655
error_t setVoiceMute(bool enable)
Configure ES8311 DAC mute or not.
Definition ES8311.h:597
error_t start(codec_mode_t mode)
Start ES8311 codec chip.
Definition ES8311.h:751
static constexpr uint8_t ES8311_DAC_REG33
Definition ES8311.h:287
static constexpr uint8_t ES8311_SYSTEM_REG10
Definition ES8311.h:272
static constexpr uint8_t ES8311_CLK_MANAGER_REG04
Definition ES8311.h:260
void setMclkSrc(int8_t src)
Defines the source of the master clock (FROM_MCLK_PIN or FROM_SCLK_PIN)
Definition ES8311.h:309
static constexpr uint8_t ES8311_SYSTEM_REG0C
Definition ES8311.h:268
int readReg(uint8_t reg_addr)
Definition ES8311.h:637
int i2c_addr
Definition ES8311.h:810
static constexpr uint8_t ES8311_SYSTEM_REG11
Definition ES8311.h:273
int getCoeff(uint32_t mclk, uint32_t rate)
look for the coefficient in es8311_coeff_div[] table
Definition ES8311.h:645
static constexpr int bitVal(int nr)
Definition ES8311.h:297
error_t configI2S(codec_mode_t mode, I2SDefinition *iface)
Configure ES8311 codec mode and I2S interface.
Definition ES8311.h:511
static constexpr uint8_t ES8311_CLK_MANAGER_REG05
Definition ES8311.h:261
static constexpr uint8_t ES8311_ADC_REG1A
Definition ES8311.h:282
static constexpr uint8_t ES8311_SYSTEM_REG0F
Definition ES8311.h:271
static constexpr uint8_t ES8311_ADC_REG16
Definition ES8311.h:278
int8_t getMclkSrc(void)
Definition ES8311.h:310
static constexpr uint8_t ES8311_SYSTEM_REG14
Definition ES8311.h:276
static constexpr uint8_t ES8311_DAC_REG31
Definition ES8311.h:285
static constexpr uint8_t ES8311_ADC_REG18
Definition ES8311.h:280
static constexpr uint8_t ES8311_MAX_REGISTER
Definition ES8311.h:296
int8_t mclk_src
Definition ES8311.h:811
void setWire(i2c_bus_handle_t handle)
Defines the I2C bus instance to be used.
Definition ES8311.h:301
static constexpr int INVERT_MCLK
Definition ES8311.h:252
static constexpr int FROM_SCLK_PIN
Definition ES8311.h:251
static constexpr uint8_t ES8311_CLK_MANAGER_REG06
Definition ES8311.h:262
static constexpr int INVERT_SCLK
Definition ES8311.h:253
static constexpr uint8_t ES8311_GPIO_REG44
Definition ES8311.h:291
static constexpr int FROM_MCLK_PIN
Definition ES8311.h:250
static constexpr int MCLK_DIV_FRE
Definition ES8311.h:255
static constexpr uint8_t ES8311_DAC_REG32
Definition ES8311.h:286
static constexpr uint8_t ES8311_DAC_REG34
Definition ES8311.h:288
static constexpr int IS_DMIC
Definition ES8311.h:254
static constexpr uint8_t ES8311_ADC_REG17
Definition ES8311.h:279
void readAll()
Print all ES8311 registers.
Definition ES8311.h:626
error_t writeReg(uint8_t reg_addr, uint8_t data)
Definition ES8311.h:632
i2c_bus_handle_t i2c_handle
Definition ES8311.h:809
static constexpr uint8_t ES8311_CHD1_REGFD
Definition ES8311.h:293
error_t setVoiceVolume(int volume)
Set voice volume (0~100)
Definition ES8311.h:553
static constexpr uint8_t ES8311_CHVER_REGFF
Definition ES8311.h:295
error_t stop(codec_mode_t mode)
Stop ES8311 codec chip.
Definition ES8311.h:802
void suspend(void)
set es8311 into suspend mode
Definition ES8311.h:671
error_t setBitsPerSample(sample_bits_t bits)
Configure ES8311 data sample bits.
Definition ES8311.h:723
static constexpr uint8_t ES8311_GP_REG45
Definition ES8311.h:292
static constexpr uint8_t ES8311_DAC_REG35
Definition ES8311.h:289
static constexpr uint8_t ES8311_ADC_REG19
Definition ES8311.h:281
static constexpr uint8_t ES8311_CLK_MANAGER_REG07
Definition ES8311.h:263
error_t getVoiceVolume(int *volume)
Get voice volume (0~100)
Definition ES8311.h:574
static constexpr uint8_t ES8311_ADC_REG15
Definition ES8311.h:277
static constexpr uint8_t ES8311_SYSTEM_REG13
Definition ES8311.h:275
static constexpr uint8_t ES8311_CLK_MANAGER_REG03
Definition ES8311.h:259
static constexpr uint8_t ES8311_SDPIN_REG09
Definition ES8311.h:265
error_t configFmt(I2SDefinition fmt)
Configure ES8311 I2S format.
Definition ES8311.h:685
static constexpr uint8_t ES8311_SYSTEM_REG0E
Definition ES8311.h:270
error_t init(codec_config_t *codec_cfg)
Initialize ES8311 codec chip.
Definition ES8311.h:313
static constexpr uint8_t ES8311_SYSTEM_REG0B
Definition ES8311.h:267
Namespace for audio driver components.
Definition AudioBoard.h:5
sample_bits_t
Definition DriverCommon.h:235
@ BIT_LENGTH_24BITS
Definition DriverCommon.h:240
@ BIT_LENGTH_32BITS
Definition DriverCommon.h:241
@ BIT_LENGTH_16BITS
Definition DriverCommon.h:237
codec_mode_t
Definition DriverCommon.h:290
@ CODEC_MODE_MIN
Definition DriverCommon.h:291
@ CODEC_MODE_ENCODE
Definition DriverCommon.h:293
@ CODEC_MODE_BOTH
Definition DriverCommon.h:295
@ CODEC_MODE_DECODE
Definition DriverCommon.h:294
@ CODEC_MODE_LINE_IN
Definition DriverCommon.h:296
int error_t
Definition DriverCommon.h:150
es8311_mic_gain_t
Definition ES8311.h:39
@ ES8311MIC_GAIN_42DB
Definition ES8311.h:48
@ ES8311MIC_GAIN_MIN
Definition ES8311.h:40
@ ES8311MIC_GAIN_MAX
Definition ES8311.h:49
@ ES8311MIC_GAIN_12DB
Definition ES8311.h:43
@ ES8311MIC_GAIN_18DB
Definition ES8311.h:44
@ ES8311MIC_GAIN_24DB
Definition ES8311.h:45
@ ES8311MIC_GAIN_30DB
Definition ES8311.h:46
@ ES8311MIC_GAIN_36DB
Definition ES8311.h:47
@ ES8311MIC_GAIN_6DB
Definition ES8311.h:42
@ ES8311MIC_GAIN_0DB
Definition ES8311.h:41
@ RATE_44K
Definition DriverCommon.h:220
@ RATE_24K
Definition DriverCommon.h:218
@ RATE_22K
Definition DriverCommon.h:217
@ RATE_8K
Definition DriverCommon.h:214
@ RATE_32K
Definition DriverCommon.h:219
@ RATE_11K
Definition DriverCommon.h:215
@ RATE_16K
Definition DriverCommon.h:216
@ RATE_48K
Definition DriverCommon.h:221
@ I2S_RIGHT
Definition DriverCommon.h:253
@ I2S_DSP
Definition DriverCommon.h:254
@ I2S_LEFT
Definition DriverCommon.h:252
@ I2S_NORMAL
Definition DriverCommon.h:251
@ MODE_MASTER
Definition DriverCommon.h:205
@ MODE_SLAVE
Definition DriverCommon.h:204
void * i2c_bus_handle_t
Definition DriverCommon.h:155
I2S interface parameters for the audio codec.
Definition DriverCommon.h:384
i2s_format_t fmt
Definition DriverCommon.h:386
samplerate_t rate
Definition DriverCommon.h:387
i2s_master_slave_t mode
Definition DriverCommon.h:385
sample_bits_t bits
Definition DriverCommon.h:388
Top-level codec configuration passed to the audio driver at init.
Definition DriverCommon.h:397
I2SDefinition i2s
Definition DriverCommon.h:400
Definition ES8311.h:55
uint8_t fs_mode
Definition ES8311.h:62
uint32_t mclk
Definition ES8311.h:56
uint8_t lrck_h
Definition ES8311.h:63
uint8_t dac_osr
Definition ES8311.h:67
uint8_t dac_div
Definition ES8311.h:61
uint8_t pre_multi
Definition ES8311.h:59
uint32_t rate
Definition ES8311.h:57
uint8_t adc_div
Definition ES8311.h:60
uint8_t bclk_div
Definition ES8311.h:65
uint8_t adc_osr
Definition ES8311.h:66
uint8_t pre_div
Definition ES8311.h:58
uint8_t lrck_l
Definition ES8311.h:64